NUCLEO-L552ZE-Q : 32bits data formats via SPI

[nala_ed70]

Hello, do you know if we can transmit data formats of 32 bits via SPI in NUCLEO-L552ZE-Q. and if yes, how?

[mfgkw]

That depends on the comm partner.

If you have to develop both sides it is up to you how it will be done - byte by byte or half word by half word, and if binary or converted to some kind of text (like ubase64).

[Andrew Neil]

That would be down to the MCU - nothing to do with the board - so check the MCU's datasheet.

The datasheet - and other documentation & resources - will be found on the MCU's Product Page:

https://www.st.com/resource/en/datasheet/stm32l552ze.pdf#page=75

via: https://www.st.com/en/microcontrollers-microprocessors/stm32l552ze.html

But, of course, you can send a 32-bit value as 8x4 bits, or 4x8 bits, or 2x16 bits.

Or even 2x8 bits plus 1x16 bits - if you really wanted to ...

[Andrew Neil]

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@mfgkw wrote:

That depends on the comm partner.

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The STM32L552ZE SPI hardware can't do 32 bits as such - it would have to be synthesised from smaller "chunks" of 4-16 bits.

[Ozone]

SPI is a relatively simple protocol, realizing a bidirectional shift register.
A transmission starts with a /SS going low and is ended with /SS going high again, both controlled by the master.
The number of transferred bits is theoretically arbitrary, but most STM32 MCUs support only 8, 16 or 24 bit directly. This means the STM32 SPI peripheral will only handle transfers of those sizes automatically, directly in hardware.

Transferring any other number of bits is not difficult as long as it's a multiple of the lowest supported size, i.e. 1 byte.
Configure software control for the /SS signal, and consecutively feed the number of bytes to the Tx register to accomplish a full transfer - 4 in your case.
Use the "Tx Empty" flag to feed consecutive bytes, and "transmission complete" for /SS handling.

[nala_ed70]

Thank you! What do you mean by  /SS? I am relatively new to programming microcontrollers. I am using the board as a master to control another chip. Basically, if I want to control the second bit of the first register high and the 4-th bit of the 15 register high, seeing something like this should be correct or .....? Can you maybe provide some more insights, please? Because I see here some idle time after 16 cycles and I am not sure which chucks of information are together

[Andrew Neil]

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@nala_ed70 wrote:

What do you mean by  /SS?

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That's the Slave Select signal.

The '/' prefix indicates that it's active-low; sometimes written SSn

The diagram shows it with a bar over the top - but that's hard to do with normal text:

https://en.wikipedia.org/wiki/Serial_Peripheral_Interface

Gaps in the transmission shouldn't matter - the bus is only sampled at clock edges.

PS:

So here, presumably, you have your STM32 set to 16 bits?

You can tell that by the groups of 16 clock pulses - one clock for each bit.

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@nala_ed70 wrote:

 Can you maybe provide some more insights, please?

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I think the original question - "can the STM32 do 32 bits" - has been answered?

If so, please mark the solution, and start a new thread for a new question.

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@nala_ed70 wrote:

I am using the board as a master to control another chip.

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It would help to say what chip.

[Andrew Neil]

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@Ozone wrote:

 most STM32 MCUs support only 8, 16 or 24 bit directly. .

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The one under discussion here does 4-16 bits.

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@Ozone wrote:

Transferring any other number of bits is not difficult as long as it's a multiple of the lowest supported size

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Not necessarily the lowest - just something that can be synthesised with a number of transfers of supported sizes.

[Ozone]

> The one under discussion here does 4-16 bits.

The ones' I know do, so I was careful not to over-generalize ...

> Not necessarily the lowest - just something that can be synthesised with a number of transfers of supported sizes.

Which often amounts to the same.
One can reconfigure the data size between transfers, I have done so myself.
But that might become tedious with "odd" sizes.

I mostly dealt with devices that required 8 bits for commands, register addresses and status registers, and 16 bits for data.