Need to evaluate Serial NAND using the QSPI controller available in STM32F446RE Evaluation board

[FA.11]

Dear ST Technical team,

We have the following queries for STM32F446RE evaluation board.

Our Requirement

We need to evaluate Serial NAND using the QSPI controller available in STM32F446RE Evaluation board

Queries for ST team

1.      Does STM32F446RE nucleo board has the QSPI pins exposed for connectivitiy. Kindly let us know the pins

2.      Please provide us the schematics for STM32F446RE evaluation board

3.      Kindly let us is there a QSPI IAR example available to experiment the Serial NAND in STM32F446RE board. Please do share the link for the same

Please let us know incase of clarifications

Thanks and regards

Franklin Sunder A

[Imen.D]

Hello,

Do you mean to use NUCLEO-F446RE or STM32446E-EVAL ?

You can check the STM32F446xC/E  datasheet or UM1871 User manual Evaluation board with STM32F446ZE MCU (contains the Electrical schematics)

There is no NAND flash on QSPI examples with the Cube Firmware package, we have only NOR on QSPI examples:

STM32Cube_FW_F4_V1.24.0\Projects\STM32446E_EVAL\Examples\QSPI\

Regards,

Imen

[FA.11]

Dear IMEN DAHMEN,

Thanks for answering to our queries. We have some more queries

Let me first explain our environment

Environment:

1.      We have 2 count of STM32446RE- Nucleo(64 pin)[Nucleo – F446RE] boards with us

2.      We want to evaluate QSPI functionality with our toshiba serial interface NAND (SPI-NAND)

3.      We understand this boards supports only single and dual transfer bit mode as the STM32F446 package is a 64 pin package

4.      We are using IAR environment to test and evaluate Serial Interface NAND

5.      We have checked the IAR environment for STM32 examples solutions. We found QSPI example solution available only for STM32F446E- Evaluation board

6.      However we are planning to use the QSPI example of STM32F446E-Eval to be executed in STM32F446RE(nucleoo) board

Queries:

Question 1: We checked from the manuals these are the pins for QSPI from connectors. Please confirm whether our understanding is correct

 QSPI signal-> QSPI pins->Connector in STM32F446RE board

QSPI _CLK -> PB2 -> CN10(22)

QSPI_BK1_IO0/SO-> PC9-> CN10(1)

QSPI_BK1_IO1/SI-> PC10 -> CN7(1)

QSPI_BK1_nCS-> PB6-> CN5(3)-CN10(17)

Vcc-> CN6(4),CN7(16)

VSS-> CN6(6),CN7(20)

Question 2: We have changed the GPIO settings for QSPI configured for STM32446E-Evaluation board to STM32446RE (nucleo) board. Please find the code belwo

#define QSPI_CS_PIN               GPIO_PIN_6

#define QSPI_CS_GPIO_PORT         GPIOB

#define QSPI_CLK_PIN              GPIO_PIN_2

#define QSPI_CLK_GPIO_PORT        GPIOB

#define QSPI_D0_PIN               GPIO_PIN_9 /* This gpio pin is QSPI_BK1_IO0/SO*/

#define QSPI_D0_GPIO_PORT         GPIOC

#define QSPI_D1_PIN               GPIO_PIN_10/* This gpio pin is QSPI_BK1_IO1/SI*/

#define QSPI_D1_GPIO_PORT         GPIOC

/* The below lines are not available in STM32F446RE board so we commented it*/

//#define QSPI_D2_PIN               GPIO_PIN_7

//#define QSPI_D2_GPIO_PORT         GPIOF

//#define QSPI_D3_PIN               GPIO_PIN_6

//#define QSPI_D3_GPIO_PORT         GPIOF

Please confirm whether above configuration is correct

Question 3: Is there any other settings which we need to do inorder to run the QSPI example on STM32446RE- nucleo board

Question 4: do you have any IAR example for QSPI which works on STM32446RE nucleo board directly

Please let us know in case of clarifications

Thanks and regards

Franklin Sunder A

[Tesla DeLorean]

Considered​ eMMC?

[FA.11]

No, Our main motive is to evaluate SPI-NAND on STM32F446RE with QSPI controller

[Imen.D]

Hello,

Your configuration and GPIO settings for QSPI are correct.

Do you need to use the SPI-NAND memory for code or data ?

The QSPI setting depends on your memory parameters configuration. You can have a look at this AN4760 Application note Quad-SPI (QSPI) interface on STM32 microcontrollers, which helps you to use and configure Quad-SPI memories.

You can inspire from the Eval QSPI example available under the Cube package and re-use sections or modify the code depending on your needs.

Regards,

Imen

[FA.11]

Dear IMEN DAHMEN,

Thanks for answering my queries in very short span of time.

We are using the SPI-NAND just to store data.

In a simple case , SPI-NAND is not available for booting or execute in place. Its just used to store data.

I have already gone through the AN4760 application note available.

Could you also confirm our below configurations

* Enable GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF and GPIOG interface

 clock */ 

 RCC->AHB1ENR |= 0x0000007F;

   /* Connect PB2 and PB6 pins to Quad-SPI Alternate function */

 GPIOB->AFR[0] = 0x0A000900;

 GPIOB->AFR[1] = 0x00000000;

 /* Configure PBx pins in Alternate function mode */

 GPIOB->MODER |= 0x00002020;

 /* Configure PBx pins speed to 100 MHz */

 GPIOB->OSPEEDR |= 0x00003030;

 /* Configure PBx pins Output type to push-pull */

 GPIOB->OTYPER = 0x00000000;

 /* No pull-up, pull-down for PBx pins */

 GPIOB->PUPDR |= 0x00000000;

thanks for your excellent support

Regards

Franklin Sunder A

[FA.11]

Dear ST Community

We are able interface Serial NAND device with QSPI Controller on STM32F446-ZE nucleo board. we are able to do basic read and write operations.

Working Environment -> IAR work bench

We are facing following Issue:

If we run our test application approximately 30 min on STM32F446ZE board, we are getting Fatal Error: ST-Link USB communication error

Please address the above issue it is blocking for our product development as well to purchase of many new STM32F446ZE board.

Image is attached for your further reference

Regards,

Franklin

[Tesla DeLorean]

Have you tried your local FAE servicing your account?

Perhaps you can use a logic analyzer to see if it is hung up of a QSPI transaction, or way-point flow via GPIO output.

Loss of debugger connectivity in this context relates either to a loss of power (low power state), or some kind of dead-lock on the internal bus.

If you output telemetry via SWV/USART are you able to see any consistency with the loss of connectivity.

Does the system lock outside of the debugger?