My STM32G473 has wrong flash size? How do I deal with this?

[tomaszuk]

I have STM32G473VCT6 MCU. According to part number this device should have 256kB flash (Size code C). Flash size register (0x1FFF75E0) also shows 256kB (reg. value 0x100). However I can read and successfully write 512kB of data. STM32CubeProgrammer also shows 256 pages with 2kB each. Memory layout works as for 512kB device.

This is genuine ST chip. I bought it from mouser.

I understand that all size versions are manufactured identically and later sorted into three size groups to optimize sales in multiple price categories.

Question 1. Why this extra flash is not locked or hidden from the users?

This extra flash causes some confusion because datasheet is very ambiguous on this topic. Quote from STM32G473xB/C/E datasheet: "The STM32G473xB/xC/xE devices feature 512 kbytes of embedded Flash memory which is available for storing programs and data." This would mean that all 3 type have 512kB of flash memory, but when you look into feature table or ordering information, then it says B=128kB, C=256kB and E=512kB.

Question 2. How should I organize my code that it would be compatible with true 256kB device? I think it is not common to have more flash than You paid for.

If I am working in dual bank mode, should I use half of each bank (64 pages instead of 127)? Or should I use only 1 bank? Or half of each page? How about addressing? Do I have hole in address space between bank 1 and bank 2? Does addressing changes when I switch to single bank mode?

These questions arise from ambiguity in STM32G4 Reference Manual (RM0440) on memory layout. All the memory layout tables in the document are valid for 512kB device but not always makes sense for 256kB or 128kB devices.

Thank You

[TDK]

> Question 1. Why this extra flash is not locked or hidden from the users?

The extra RAM is there, just not tested and not guaranteed to work. ST has presumably done the calculation that it is cheaper to have a single die and only test half of the FLASH that it would be to have two different dies.

> Question 2. How should I organize my code that it would be compatible with true 256kB device? I think it is not common to have more flash than You paid for.

I agree with your assessment that it's terribly ambiguous here. On other families, there is a gap in dual bank mode which ST confirmed. If I can find the post about this, I will edit and link it.

[tomaszuk]

@TDK​  Thank's for quick answer.

I assume that for 256kB device in dual bank mode "tested" flash part is half of each bank (page 0-63), then address space is 0x08000000 - 0x0801FFFF for bank 1 and 0x08040000 - 0x0805FFFF for bank 2. In single bank mode, "tested" address space probably would be: 0x08000000 - 0x0803FFFF.

I just want to have confirmation that my assumption is right.

[TDK · Accepted solution]

Found it, here you go:

https://community.st.com/s/question/0D50X0000BrDcCs/flash-layout-of-stm32g4xx-cat-3-with-less-than-512-kbyte-missing-in-rm0440

You assumption is correct. Gap in dual bank mode, no gap in single bank mode.