2018-04-22 10:40 PM
Hello.
MCU: STM32L432KC. I'm trying to use SAI1 peripheral in master mode with master clock (MCLK) generation. I've found MCLK has drop pulses. You can see this at attached picture.
Clock configuration:1. LSE with crystal 32768 Hz;2. MSI with PLLMODE enabled;3. RCC registers values:CR = 0x0C0000BFICSCR = 0x106F008CCFGR = 0x0PLLCFGR = 0x00001071PLLSAI1CFGR = 0xA8012B00CCIPR = 0x0CSR = 0x1C000600Is i missed something?Thanks.Solved! Go to Solution.
2018-04-25 04:15 PM
Sample rate is 24 MHz.
The RCC settings indicate you want to output a clock at around 12.8MHz. The period of such is around 78ns, thus the duration of HIGH and LOW (if 1:1) is around 39us.
If you sample them each 41.7us (that's the period at 24MHz), no wonder you miss some of the pulses here and there.
JW
2018-04-23 12:43 AM
MSI with PLLMODE enabled;
Can't this be the root of problem? Can you try to switch off the PLLMODE or use some other primary clock source?
JW
2018-04-23 02:55 AM
Unfortunately, disabling 'MSI PLL Mode' does not help.
2018-04-23 07:45 PM
And how are the SAI registers set?
JW
2018-04-24 02:12 AM
Also, what's the sampling frequency of the LA you are using, and what are its analog bandwidth limits?
JW
2018-04-25 01:16 AM
SAI registers:
SAI1->GCR = 0x00000000
SAI1_Block_A->CR1 = 0x00000040SAI1_Block_B->CR1 = 0x00010081SAI1_Block_A->CR2 = 0x00000000SAI1_Block_B->CR2 = 0x00000000SAI1_Block_A->FRCR = 0x00000007SAI1_Block_B->FRCR = 0x00050F1FSAI1_Block_A->SLOTR = 0x00000000SAI1_Block_B->SLOTR = 0xFFFF0140SAI1_Block_A->IMR = 0x00000000SAI1_Block_B->IMR = 0x00000000SAI1_Block_A->SR = 0x00000008SAI1_Block_B->SR = 0x00000000SAI1_Block_A->CLRFR = 0x00000000SAI1_Block_B->CLRFR = 0x00000000SAI1_Block_A->DR = 0x00000000SAI1_Block_B->DR = 0x00000000LA is the Saleae clone with SN74LVC2T45 level translators. Sample rate is 24 MHz. Unfortunately i don't know real bandwith of that device.
2018-04-25 01:17 AM
Forgot to explain: i use MCU only as clock generator.
2018-04-25 04:15 PM
Sample rate is 24 MHz.
The RCC settings indicate you want to output a clock at around 12.8MHz. The period of such is around 78ns, thus the duration of HIGH and LOW (if 1:1) is around 39us.
If you sample them each 41.7us (that's the period at 24MHz), no wonder you miss some of the pulses here and there.
JW
2018-04-26 04:05 AM
it was sample rate problem. My superfault. Thanks all to advice.