2018-10-08 07:57 AM
Hi all,
Using STM32L476.
I had some issues with LSE (ready flag is never set), and so I experimented with different capacitors.
During our experimentation I tried to intentionally cause the LSE to fail (never mind why) by touching its capacitors with my finger. Once the LSE failed it never recovers, even if I reset the system the LSE will keeps failing, until I remove the battery/power supply completely.
That means that if there's a fault with the LSE, for any reason, the system cannot recover by turning the LSE drive off and on, not even system reset. Is that normal? Is there a solution?
Removing the battery is not an option, the battery is not removable, and power off doesn't cut the power just puts the system in standby.
EDIT:
forgot to add my code, adding just the relevant parts -
initialization:
LL_RCC_LSE_Enable();
timeout = 0;
while ((LL_RCC_LSE_IsReady() != 1) && (++timeout < eMCU_DELAY_2_5SEC));
if (timeout >= eMCU_DELAY_2_5SEC)
{
system_health_flags |= e_LSE_FAILED;
LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_LSI);
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI);
LL_RCC_LSE_Disable();
}
else
{
LL_RCC_SetLPTIMClockSource(LL_RCC_LPTIM1_CLKSOURCE_LSE);
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
}
LL_RCC_EnableRTC();
HAL_RCCEx_EnableLSECSS_IT();
LSECSS interupt:
/**
* @brief This function handles RTC tamper and time stamp, CSS on LSE interrupts through EXTI line 19.
*/
void TAMP_STAMP_IRQHandler(void)
{
if (__HAL_RCC_GET_IT(RCC_IT_LSECSS))
{
HAL_RCCEx_LSECSS_IRQHandler();
}
}
LSECSS callback:
/**
* @brief RCCEx LSE Clock Security System interrupt callback.
* @retval none
*/
void HAL_RCCEx_LSECSS_Callback(void)
{
if (__HAL_RCC_LSECSS_EXTI_GET_FLAG() || __HAL_RCC_GET_FLAG(RCC_FLAG_LSECSSD))
{
system_health_flags |= e_LSE_FAILED;
HAL_PWR_EnableBkUpAccess();
HAL_RCCEx_DisableLSECSS();
__HAL_RCC_LSECSS_EXTI_DISABLE_IT();
LL_RCC_LSE_Disable();
if (__HAL_RCC_GET_RTC_SOURCE() == RCC_RTCCLKSOURCE_LSE)
{
__HAL_RCC_RTC_DISABLE();
__HAL_RCC_BACKUPRESET_FORCE();
__HAL_RCC_BACKUPRESET_RELEASE();
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI);
LL_RCC_EnableRTC();
MX_RTC_Init(&flags);
}
__HAL_RCC_LSECSS_EXTI_CLEAR_FLAG();
}
}
Solved! Go to Solution.
2018-11-07 12:47 PM
Hi Amel,
Formally, you are right. Nevertheless, is it such a bad idea to add a line to RCC_BDCR.LSECSSD description, saying "cleared only by backup domain reset"?
More importantly, it appears that LSE can't be enabled unless LSECSSD is cleared (as we know now, by resetting the backup domain) - I did not try myself by that's what Clonimus74 appears to be experiencing; Shouldn't this fact also be documented - maybe at description of the LSEON bit?
The bottom line is, that the scenario of attempting to re-enable LSE after failure is not considered in the RM at all, not only in these details in the registers'/bits' description, but also in the narrative in 6.2.11 Clock security system on LSE subchapter.
There's no such thing as too much information... ;)
Jan