2020-11-17 10:47 AM
I am using a current sense amplifier (INA190) to measure current. The output of the current sense amplifier will go to the input of the ADC on the STM32. The output range will (ideally) be between (0-VREF). From working with an external 16 bit ADC, I know that an RC filter is often required at the input of SAR ADCs to reduce charge kickback and voltage droop from the sample and hold capacitor. From the datasheet of the STM32F072 series, it looks like the sample and hold capacitor CADC is 8pF. However, there is no filtering capacitor to hold charge and reduce voltage droop. My question is thus, is it required/will it greatly improve the accuracy to include an external filter capacitor shunted to ground along with some series resistance (to isolate the capacitive load from the amplifier). Are there any guidelines that STM has provided for this?
2020-11-18 07:43 AM
An important precaution during an ADC acquisition is to respect the Shannon theorem. So you have to place a filter at a frequency less than 1/2 the acquisition frequency.
The second effect of this filter (if it is passive) is to provide energy reserve for the sample and hold capacitor and reduce the voltage drop.