Is STM32F446RE internal oscillator drift of 500ppm in worst cases or can it be more ?

[LQuit.1]

Trying to synchronize in time three different STM32F446RE MCUs. I first tried to look how internal oscillators drift compared to each others.

The datasheet says that the precision of the oscillations are of 500ppm (parts per million). So every 1000000 oscillations there can be a 500 oscillation shift compared to what a million oscillations should bring us, am I right ?

However, I observed with the code in annex that the parts per million are a lot more than expected so I was wondering if I was missing something.

I can observe 4000ppm with one of the three MCUs I use and 2000ppm and 1000ppm for the two others.

Using the PLL or not to change the oscillations frequency output doesn't change anything and the parts per million observed stay the same.

Can someone help me understand where I am missing something please ?

[waclawek.jan]

What do you mean by "internal oscillator"?

> The datasheet says that the precision of the oscillations are of 500ppm (parts per million).

Where does it say that? Post screenshot.

JW

[TDK · Accepted solution]

I'm guessing this is what you're looking at. Note that it's referring to the HSE accuracy with an external crystal, not the accuracy of the internal HSI oscillator, which is considerably worse than 500 ppm.

 

> So every 1000000 oscillations there can be a 500 oscillation shift compared to what a million oscillations should bring us, am I right ?

That's what 500 ppm means, yes.

[LQuit.1]

Thank you for your answers. This is the datasheet part I was looking at @TDK​ so I was mistaking HSE with HSI...

So this parameter doesn't mean anything for HSE,. If I chose to put a 20ppm accuracy crystal, it will stay unchanged right ?

[waclawek.jan]

Precision of oscillation frequency of a crystal is given mainly by the loading capacitance. Read AN2867.

Drift and jitter (i.e. how does it change in time/temperature, in long/short term) is a very complex topic; temperature has perhaps the most dramatic influence. The chip itself impacts drift/jitter only secondarily and only in minor way.

JW

[LQuit.1]

Okay thank you @Community member​ so I will probably observe a drift of more than 20ppm with my external crystal if the chip itself influences the shift ?

[waclawek.jan]

Maybe I was not very clear.

In crystal oscillator, the behaviour is mostly determined by the crystal and the loading capacitors (which includes parasitic capacitances of the tracks and pins, too). The STM32 does not influence it.

JW

[TDK]

> So this parameter doesn't mean anything for HSE,. If I chose to put a 20ppm accuracy crystal, it will stay unchanged right ?

If you adhere to the recommendations, you will get the crystal's listed accuracy (barring a defective part).

I'm not sure why they list ±500ppm on the HSE chart. It seems misplaced IMO. Maybe they wanted to show that HSE is way more accurate and that you'd be hard pressed to find a crystal with less accuracy than 500ppm.

Read this for all the details.

https://www.st.com/resource/en/application_note/cd00221665-oscillator-design-guide-for-stm8afals-stm32-mcus-and-mpus-stmicroelectronics.pdf

[waclawek.jan]

> I'm not sure why they list ±500ppm on the HSE chart.

This is a common practice of semiconductor manufacturers, to place bogus parameters to the parameters table, just because users expect them to be there. Here, some dominant (read: $M++) user asked, "is HSE good for USB?" and this was ST's solution to assure them.

Note how often I2C products contain copy of the timing table from the I2C standard - often several variants of it - regardless of what the real performance of the chip is.

JW