Is it possible to generate both interrupt event and control GPIO from timer simultaneously?

KPeso.1 · ‎2020-02-16

I need to use STM32G070 Timer 17 output compare channel as one pulse PWM1 mode to produce delay and pulse duration at GPIO output pin (this is working!) AND also an interrupt/event at the end when ARR value has been reached (this is not working). Is it possible to get both working simultaneuosly? If yes, what callback function should work? And is there some special initializations to be made? I'm using MXCube and HAL.

waclawek.jan · ‎2020-02-16

> when ARR value has been reached

This generates the Update event, which triggers an interrupt if TIMx_DIER.UIE is set - read out the TIM17 registers and check if this bit is set.

You have to have the interrupt enabled in NVIC (again, read out NVIC registers and check) and the interrupt service routine's (ISR) address has to be inserted into the proper position in the vector table (check in disasm, also check if you've used the correct ISR name, the source for vector table is usually located in the startup file).

JW

KPeso.1 · ‎2020-02-22

Thank you. I got it working.

Now, I have different question about timers: In input capture mode, is there always the latest captured signal edge's timestamp available, even reading/handling of some edges is skipped?

Quote from timer cookbook:

.......

The detection of an active edge on the output of the channel prescaler triggers the transfer of the timer counter content to the “y�? register of the TIMx_CCRy timer channel. The content of the “y�? register of the TIMx_CCRy timer channel is the timestamp of the last detected active edge on the output of the channel “y�? prescaler.

......

I have implemented masking of the input signal so that there is a boolean variable, which tells if edges are handled or not. So inside the interrupt handler, there is first this if-statement, in which the variable is checked and all the code is located inside this conditionally executed if-branch. So if variable is set, nothing is done (e.g. no read out of the timestamp). My concern is that then when the variable allows interrupt to handled after masking, is the timestamp from this latest event and those masked ones are lost and they don't cause any issues afterwards?

waclawek.jan · ‎2020-02-23

I don't quite understand your scheme, but captures continue regardless of your program. You can stop captures to happen by clearing the respective CCxE but in TIMx_CCER register.

JW

KPeso.1 · ‎2020-02-23

OK, thanks for info and possibility to really stop captures. Anyway, it seems that my scheme is also working.