Internal Clocking and Sample Rate on STM32F4 ADC

[epalaima]

Posted on July 01, 2016 at 18:59

Hi, I was wondering how the built in ADC on the STM32F4 was clocked, and how I could go about checking it's clock frequency.

I know that the sample rate is configured by dividing the clock (e.g.

ADC_SampleTime_480Cycles).

So I'd like to figure out the clock rate and thereby be able to set a specific sample rate.

#clock #adc #sampling-rate

[Tesla DeLorean]

Posted on July 01, 2016 at 20:45

Ok, so that time plus the 12 cycles for a 12-bit conversion. The clock going to the ADC is from the APB/AHB to which it is attached, that is divided down by the prescaler you can chosen for the ADC. So cycles of the clock coming out of the scaler/divider. So if that is 14 MHz, then 492 cycles of that.

If you want samples to occur at a specific clock or sample rate, you'd want to setup a timer and use that to trigger the start of the conversion. The converted value can then be services by an EOC interrupt, or by a DMA transfer to a memory array. If sample more than one channel you will need to use DMA