2023-02-15 11:59 AM
I have not been able to get CAN2_RX0_IRQ or CAN3_RX0_IRQ to fire. CAN1_RX0_IRQ works as expected. It appears that rather than the CAN IRQs firing, the WWDG interrupt is going off for CAN2_RX0 and the DMA1_Stream0 is going off for CAN3_RX0. Neither the WWDG or the DMA1_Stream0 interrupts are enabled. I was able to figure this out because CAN1 works as long as you do not connect anything to CAN2 or CAN3. If you plug other nodes into either of those CAN busses the mcu would die at the other interrupt handlers. After messing with the CAN initialization and filters for days, I decided to just try calling HAL_CAN_IRQHandler from the improper interrupt handler and sure enough I have communication working on all three can busses. The vector table start has been placed at 0x8060100. Below you can see that I have disassembled the addresses for the IRQ's in question. They all make a call to HAL_CAN_IRQHandler that then calls the FIFO0PendingCallback where we read in the CAN messages, but the CAN interrupt handlers are never called. All of this has led me to believe this is an actual hardware problem or a micro code issue that is looking up the incorrect interrupt. I have already considered that the vector offset was messed up, but the CAN1 interrupts have never stopped working.
loactions of irqs according to the user manual
WWDG 0x00000040
Dma1_Stream0 0x0000006c
CAN2_RX0 0x00000140
CAN3_RX0 0x0000016c
(gdb) disassemble *0x8060140
Dump of assembler code for function Hal::WWDG_IRQHandler():
0x0807fbd8 <+0>: push {r7, lr}
0x0807fbda <+2>: add r7, sp, #0
0x0807fbdc <+4>: mov.w r1, #296 ; 0x128
0x0807fbe0 <+8>: ldr r0, [pc, #24] ; (0x807fbfc <Hal::WWDG_IRQHandler()+36>)
0x0807fbe2 <+10>: bl 0x80cec30 <printf>
0x0807fbe6 <+14>: movs r1, #1
0x0807fbe8 <+16>: ldr r0, [pc, #20] ; (0x807fc00 <Hal::WWDG_IRQHandler()+40>)
0x0807fbea <+18>: bl 0x807fd50 <std::array<__CAN_HandleTypeDef, 3u>::operator[](unsigned int)>
0x0807fbee <+22>: mov r3, r0
0x0807fbf0 <+24>: mov r0, r3
0x0807fbf2 <+26>: bl 0x8083a5a <HAL_CAN_IRQHandler>
0x0807fbf6 <+30>: nop
0x0807fbf8 <+32>: pop {r7, pc}
0x0807fbfa <+34>: nop
0x0807fbfc <+36>: ldr r0, [r4, #20]
0x0807fbfe <+38>: lsrs r5, r1, #32
0x0807fc00 <+40>: lsls r0, r4, #25
0x0807fc02 <+42>: movs r0, #0
End of assembler dump.
(gdb) disassemble *0x806016c
Dump of assembler code for function Hal::DMA1_Stream0_IRQHandler():
0x0807fc68 <+0>: push {r7, lr}
0x0807fc6a <+2>: add r7, sp, #0
0x0807fc6c <+4>: movw r1, #333 ; 0x14d
0x0807fc70 <+8>: ldr r0, [pc, #24] ; (0x807fc8c <Hal::DMA1_Stream0_IRQHandler()+36>)
0x0807fc72 <+10>: bl 0x80cec30 <printf>
0x0807fc76 <+14>: movs r1, #2
0x0807fc78 <+16>: ldr r0, [pc, #20] ; (0x807fc90 <Hal::DMA1_Stream0_IRQHandler()+40>)
0x0807fc7a <+18>: bl 0x807fd50 <std::array<__CAN_HandleTypeDef, 3u>::operator[](unsigned int)>
0x0807fc7e <+22>: mov r3, r0
0x0807fc80 <+24>: mov r0, r3
0x0807fc82 <+26>: bl 0x8083a5a <HAL_CAN_IRQHandler>
0x0807fc86 <+30>: nop
0x0807fc88 <+32>: pop {r7, pc}
0x0807fc8a <+34>: nop
0x0807fc8c <+36>: ldr r0, [r4, #20]
0x0807fc8e <+38>: lsrs r5, r1, #32
0x0807fc90 <+40>: lsls r0, r4, #25
0x0807fc92 <+42>: movs r0, #0
End of assembler dump.
(gdb) disassemble *0x8060240
Dump of assembler code for function Hal::CAN2_RX0_IRQHandler():
0x0807fc04 <+0>: push {r7, lr}
0x0807fc06 <+2>: add r7, sp, #0
0x0807fc08 <+4>: movs r1, #1
0x0807fc0a <+6>: ldr r0, [pc, #16] ; (0x807fc1c <Hal::CAN2_RX0_IRQHandler()+24>)
0x0807fc0c <+8>: bl 0x807fd50 <std::array<__CAN_HandleTypeDef, 3u>::operator[](unsigned int)>
0x0807fc10 <+12>: mov r3, r0
0x0807fc12 <+14>: mov r0, r3
0x0807fc14 <+16>: bl 0x8083a5a <HAL_CAN_IRQHandler>
0x0807fc18 <+20>: nop
0x0807fc1a <+22>: pop {r7, pc}
0x0807fc1c <+24>: lsls r0, r4, #25
0x0807fc1e <+26>: movs r0, #0
End of assembler dump.
(gdb) disassemble *0x806026c
Dump of assembler code for function Hal::CAN3_RX0_IRQHandler():
0x0807fc3c <+0>: push {r7, lr}
0x0807fc3e <+2>: add r7, sp, #0
0x0807fc40 <+4>: movw r1, #327 ; 0x147
0x0807fc44 <+8>: ldr r0, [pc, #24] ; (0x807fc60 <Hal::CAN3_RX0_IRQHandler()+36>)
0x0807fc46 <+10>: bl 0x80cec30 <printf>
0x0807fc4a <+14>: movs r1, #2
0x0807fc4c <+16>: ldr r0, [pc, #20] ; (0x807fc64 <Hal::CAN3_RX0_IRQHandler()+40>)
0x0807fc4e <+18>: bl 0x807fd50 <std::array<__CAN_HandleTypeDef, 3u>::operator[](unsigned int)>
0x0807fc52 <+22>: mov r3, r0
0x0807fc54 <+24>: mov r0, r3
0x0807fc56 <+26>: bl 0x8083a5a <HAL_CAN_IRQHandler>
0x0807fc5a <+30>: nop
0x0807fc5c <+32>: pop {r7, pc}
0x0807fc5e <+34>: nop
0x0807fc60 <+36>: ldr r0, [r4, #20]
0x0807fc62 <+38>: lsrs r5, r1, #32
0x0807fc64 <+40>: lsls r0, r4, #25
0x0807fc66 <+42>: movs r0, #0
Solved! Go to Solution.
2023-02-17 01:23 PM
wow, thanks @Community member that seems to have fixed our problem. Vector table is now located at 0x8060200
2023-02-15 10:32 PM
I had wrong interrupt firering experience when the interrupt vector table was missing few vectors and some were shifted... this is something to check in the startup .s file.
2023-02-16 06:23 AM
@S.Ma thanks, i did check the whole table and it matches the order in the manual, I made sure the reserved spaces were all there as well.
2023-02-17 09:37 AM
> The vector table start has been placed at 0x8060100
You have to align VTOR to the size of vector table rounded up to nearest power of two, i.e. here at 0x200 boundary.
JW
2023-02-17 01:23 PM
wow, thanks @Community member that seems to have fixed our problem. Vector table is now located at 0x8060200