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Incorrect 16-Bit HAL SPI Result in Loop/Reset

DWill.4
Associate II

Using the stm32h745I-disco board and there seems to be an issue using HAL_SPI_Transmit in a loop. I get the correct SPI data for the initial transmission, but after that the 16-bit value is all over the place. Only 0xFFFF remains the same over the loop. Pressing reset button also gives the same behavior when function is taken out of main loop.

Configuration:

static void MX_SPI2_Init(void)
{
 
  /* USER CODE BEGIN SPI2_Init 0 */
 
  /* USER CODE END SPI2_Init 0 */
 
  /* USER CODE BEGIN SPI2_Init 1 */
 
  /* USER CODE END SPI2_Init 1 */
  /* SPI2 parameter configuration*/
  hspi2.Instance = SPI2;
  hspi2.Init.Mode = SPI_MODE_MASTER;
  hspi2.Init.Direction = SPI_DIRECTION_2LINES_TXONLY;
  hspi2.Init.DataSize = SPI_DATASIZE_16BIT;
  hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH;
  hspi2.Init.CLKPhase = SPI_PHASE_2EDGE;
  hspi2.Init.NSS = SPI_NSS_SOFT;
  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
  hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
  hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
  hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
  hspi2.Init.CRCPolynomial = 0x0;
  hspi2.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
  hspi2.Init.NSSPolarity = SPI_NSS_POLARITY_LOW;
  hspi2.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
  hspi2.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
  hspi2.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN;
  hspi2.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE;
  hspi2.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE;
  hspi2.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE;
  hspi2.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE;
  hspi2.Init.IOSwap = SPI_IO_SWAP_DISABLE;
  if (HAL_SPI_Init(&hspi2) != HAL_OK)
  {
    Error_Handler();
  }
  /* USER CODE BEGIN SPI2_Init 2 */
 
  /* USER CODE END SPI2_Init 2 */
 
}

Main:

/* SPI command and register address */
  uint16_t reg_cmd = 0xABCD;
 
  /* Infinite loop */
  /* USER CODE BEGIN WHILE */
  while (1)
  {
    /* USER CODE END WHILE */
	  register_write(reg_cmd);
	  HAL_Delay(100);
    /* USER CODE BEGIN 3 */
  }

Function:

void register_write(uint16_t spi_reg)
{
 
/* Register address array */
uint16_t w_data[1];
 
/* Write command and register address at index */
w_data[0] = spi_reg;
 
/* Transmit 1 16-bit word */
HAL_SPI_Transmit(&hspi2, w_data, 1, HAL_MAX_DELAY);
while(HAL_SPI_GetState(&hspi2) != HAL_SPI_STATE_READY);
 
}

1 ACCEPTED SOLUTION

Accepted Solutions
MasterT
Senior III

ABCD = 1010 1011 1100 1101 ,

D5E6 = 1101 0101 1110 0110

Seems lIke the same shifted sequence with wrong "1" at the beginning. Using FFFF this false shift & addition "1" is not noticeable.

I'd start debugging with SPI_PHASE_2EDGE, than SPI_MASTER_KEEP_IO_STATE_DISABLE - I read somewhere that glitches may appear,

and SPI_NSS_PULSE_ENABLE - I see it off anyway.

View solution in original post

4 REPLIES 4
TDK
Guru

Your first plot shows 0xABCD then 0xD5E6, while the second shows all 0xFFFF. I suspect these plots are from different code than what you have shown. Your code shows a 100ms delay between transmissions, but your second scope plot shows 1s between.

 

Check return value on HAL_SPI_Transmit.

I misinterpreted the explanation of the issue.

If you feel a post has answered your question, please click "Accept as Solution".
DWill.4
Associate II

No changing the delay didn't have an impact on the behavior of the SPI. Writing 0xABCD to the register exhibited the same incorrect value whether it had a 100 ms or 1000 ms delay over a loop. While changing the value to 0xFFFF remained correct over the same circumstance.

MasterT
Senior III

ABCD = 1010 1011 1100 1101 ,

D5E6 = 1101 0101 1110 0110

Seems lIke the same shifted sequence with wrong "1" at the beginning. Using FFFF this false shift & addition "1" is not noticeable.

I'd start debugging with SPI_PHASE_2EDGE, than SPI_MASTER_KEEP_IO_STATE_DISABLE - I read somewhere that glitches may appear,

and SPI_NSS_PULSE_ENABLE - I see it off anyway.

DWill.4
Associate II

Thank you. There may be a bug with the chip select. I switched from SPI Mode 3 to SPI Mode 0 and now l have a different error. The initial SPI transmission of 0xABCD is not recognized and there is a bit shift. This time the incorrect shifted value stays the same.

0693W00000D08fYQAR.png0693W00000D09NQQAZ.png