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I'm using the STM32U575CIU microcontroller and implementing the ADC driver using LL libraries. The problem is that LDORDY bit is never set, so the ADC isn't ready to get values.

JAltu.1
Associate II
 
1 ACCEPTED SOLUTION

Accepted Solutions
_andreas
Senior

You need to switch on VDDA:

// get access to PWR 
        SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);
        nop();
        // switch voltage monitor on
        SET_BIT(PWR->SVMCR, PWR_SVMCR_AVM1EN);
        nop();
        // wait until ready
        while (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA1RDY) == 0); 
        // switch off VDDA isolation
        SET_BIT(PWR->SVMCR, PWR_SVMCR_ASV); 
        // we do not need access to the PWR domain
        CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);

See RM0456

Reference manual

STM32U575/585 Arm®-based 32-bit MCUs, section 10.4.4 Independent analog peripherals supply

View solution in original post

5 REPLIES 5
_andreas
Senior

You need to switch on VDDA:

// get access to PWR 
        SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);
        nop();
        // switch voltage monitor on
        SET_BIT(PWR->SVMCR, PWR_SVMCR_AVM1EN);
        nop();
        // wait until ready
        while (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA1RDY) == 0); 
        // switch off VDDA isolation
        SET_BIT(PWR->SVMCR, PWR_SVMCR_ASV); 
        // we do not need access to the PWR domain
        CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_PWREN);

See RM0456

Reference manual

STM32U575/585 Arm®-based 32-bit MCUs, section 10.4.4 Independent analog peripherals supply

_andreas
Senior

Sorry,

        // switch voltage monitor off
        CLEAR_BIT(PWR->SVMCR, PWR_SVMCR_ASV); 

should have been

// switch VDDA isolation off
SET_BIT(PWR->SVMCR, PWR_SVMCR_ASV);

Imen.D
ST Employee

Hello @JAltu.1​ and welcome to the Community :)

Is the ADC clock enabled? Are you clearing DEEPPWD? 

If possible to share your code, so that it will be easier to understand the issue.

For more details about the ADC voltage regulator enable and disable sequences, refer to the RM0456n in Section 29.4.6: ADC Deep-power-down mode (DEEPPWD) and ADC voltage regulator (ADVREGEN).

When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.

Imen

When your question is answered, please close this topic by clicking "Accept as Solution".
Thanks
Imen

It works! Thank you.

Integrated into original answer