I can't set adc12 register of STM32G4A1KEU6

[BaBQ]

I try to using the bare-metal programming this is my code 

RCC->AHB2ENR |= (1UL<<0);  // Enable clock to GPIO port A

RCC->AHB2ENR |= (1UL<<13); // Enable clock to ADC1,2

GPIOA->MODER |= (1UL<<0);  // Set PA0 to analog mode

GPIOA->MODER |= (1UL<<1);

// GPIOA->MODER |= (1UL<<2);  // Set PA1 to analog mode

// GPIOA->MODER |= (1uL<<3);

ADC12_COMMON->CCR &= ~(1UL<<0);    // Set ADC1 to independent mode

ADC12_COMMON->CCR &= ~(1UL<<1);

ADC12_COMMON->CCR &= ~(1UL<<2);

ADC12_COMMON->CCR &= ~(1UL<<3);

ADC12_COMMON->CCR &= ~(1UL<<18);    // Set ADC1,2 prescaler to 4

ADC12_COMMON->CCR |=  (1UL<<19);

ADC12_COMMON->CCR &= ~(1UL<<20);

ADC12_COMMON->CCR &= ~(1UL<<21);

// ADC1->CR |= (1UL<<0); // Enable ADC1

// ADC1->CR |= (1UL<<31);

// ADC1->CR &= ~(1UL<<30); // single-ended input

// ADC1->CR |= (1UL<<2); // Start regular conversion

ADC1->CFGR &= ~(1UL<<3); // Set resolution to 12bit

ADC1->CFGR &= ~(1UL<<4);

ADC1->CFGR |= (1UL<<12); // Set overwritten with the last conversion result when an overrun is detected

ADC1->CFGR |= (1UL<<13); // Set continue convertion mode

ADC1->CFGR  &= ~(1UL<<15); // Set data alignment(right);

ADC1->CFGR2 &= ~(1UL<<0); // Regular Oversampling Disable

// ADC1->IER |= (1UL<<2);

ADC1->SMPR1 |=  (1UL<<3); // Set sampling time to 247.5 cycle for PA0

ADC1->SMPR1 |=  (1UL<<4);

ADC1->SMPR1 |=  (1UL<<5);

ADC1->SMPR1 &= ~(1UL<<6); // Set sampling time to 247.5 cycle for PA1

ADC1->SMPR1 |=  (1UL<<7);

ADC1->SMPR1 |=  (1UL<<8);

ADC1->SQR1 |=  (1UL<<0);   // Set channel conversion to 2 channel

ADC1->SQR1 &= ~(1UL<<1);

ADC1->SQR1 &= ~(1UL<<2);

ADC1->SQR1 &= ~(1UL<<3);

ADC1->SQR1 &= ~(1UL<<6);   // Set SQ1 for PA0

ADC1->SQR1 &= ~(1UL<<7);

ADC1->SQR1 &= ~(1UL<<8);

ADC1->SQR1 &= ~(1UL<<9);

ADC1->SQR1 &= ~(1UL<<10);

ADC1->SQR1 |=  (1UL<<12);  // Set SQ2 for PA1

ADC1->SQR1 &= ~(1UL<<13);

ADC1->SQR1 &= ~(1UL<<14);

ADC1->SQR1 &= ~(1UL<<15);

ADC1->SQR1 &= ~(1UL<<16);

ADC1->CR |= (1UL<<0); // Enable ADC1

// ADC1->CR |= (1UL<<31);

ADC1->CR &= ~(1UL<<30); // single-ended input

ADC1->CR |= (1UL<<2); // Start regular conversion

I don't know why it not work, can you help me?