Here are the schematics. I have not modified the generated code except for adding the main entrypoint and hooks that allow calls to MX_GPIO_Init() andMX_I2C1_Init();
This is my code for going to sleep and restoring from sleep
/** EXTERNALS ********************************************************/
extern FLAGS sysStat; // state flags
extern I2C_HandleTypeDef hi2c1;
/** P R I V A T E P R O T O T Y P E S & CODE ***************************************/
void fixGpio(void); // call to reinit gpio
void SwitchTo32MHz(void);
void SwitchTo32kHz(void);
void fixI2C(void); // call to reinit I2C
void doSleep(void)
{
HAL_Delay(1000);
// turn off radio
sysStat.rfsleep = 1; // say we have disabled RF
HAL_I2C_DeInit(&hi2c1);
HAL_GPIO_DeInit(GPIOA, 0x93f2);
HAL_GPIO_DeInit(GPIOB, 0xffee);
HAL_SuspendTick();
SwitchTo32kHz();
HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI);
SwitchTo32MHz();
fixGpio();
fixI2C();
HAL_ResumeTick();
PWR->CR |= PWR_CR_CWUF;
}
void SwitchTo32MHz(void)
{
/* (1) Select Vcore voltage range 1 (1.8V) */
/* (2) Enable 1 read WS on FLASH */
/* (3) Enable prefetch buffer */
/* (4) Enable HSI */
/* (5) Wait for HSI ready flag and HSIDIV flag */
/* (6) Set PLL on HSI, multiply by 4 and divided by 2 */
/* (7) Enable the PLL */
/* (8) Wait for PLL ready flag */
/* (9) Select PLL as system clock */
/* (10) Wait for clock switched on PLL */
/* (11) Disable MSI (unused) */
/* (12) Set SYSCLK prescaler to 1 */
PWR->CR = (PWR->CR & ~(PWR_CR_VOS)) | PWR_CR_VOS_0; /* (1) */
FLASH->ACR |= FLASH_ACR_LATENCY; /* (2) */
FLASH->ACR |= FLASH_ACR_PRFTEN; /* (3) */
RCC->CR |= RCC_CR_HSION; /* (4) */
while ((RCC->CR & RCC_CR_HSIRDY) != RCC_CR_HSIRDY) /* (5) */
{
}
RCC->CFGR |= RCC_CFGR_PLLSRC_HSI | RCC_CFGR_PLLMUL4 | RCC_CFGR_PLLDIV2; /* (6) */
RCC->CR |= RCC_CR_PLLON; /* (7) */
while ((RCC->CR & RCC_CR_PLLRDY) == 0) /* (8) */
{
}
RCC->CFGR = ((RCC->CFGR & ~(RCC_CFGR_SW)) | RCC_CFGR_SW_PLL); /* (9) */
while ((RCC->CFGR & RCC_CFGR_SWS_PLL) != RCC_CFGR_SWS_PLL) /* (10) */
{
}
RCC->CR &= ~RCC_CR_MSION; /* (11) */
RCC->CFGR = ((RCC->CFGR & ~(RCC_CFGR_HPRE)) | RCC_CFGR_HPRE_DIV1); /* (12) */
}
void SwitchTo32kHz(void)
{
/* (1) Enable MSI */
/* (2) Wait for MSI ready flag */
/* (3) Select MSI Range 0 (65kHz) */
/* (4) Select MSI as system clock */
/* (5) Wait for clock switched on MSI */
/* (6) Set SYSCLK prescaler to 2 */
/* (7) Disable HSI (unused) */
/* (8) Disable PLL (unused) */
/* (9) Disable prefetch buffer (not needed) */
/* (10) Disable 1 read WS on FLASH (not needed) */
/* (11) Select Vcore voltage range 3 (1.2V) */
RCC->CR |= RCC_CR_MSION; /* (1) */
while ((RCC->CR & RCC_CR_MSIRDY) != RCC_CR_MSIRDY) /* (2) */
{
}
RCC->ICSCR = ((RCC->ICSCR & ~(RCC_ICSCR_MSIRANGE)) | RCC_ICSCR_MSIRANGE_0); /* (3) */
RCC->CFGR = ((RCC->CFGR & ~(RCC_CFGR_SW)) | RCC_CFGR_SW_MSI); /* (4) */
while ((RCC->CFGR & RCC_CFGR_SWS_MSI) != RCC_CFGR_SWS_MSI) /* (5) */
{
}
RCC->CFGR = ((RCC->CFGR & ~(RCC_CFGR_HPRE)) | RCC_CFGR_HPRE_DIV2); /* (6) */
RCC->CR &= ~RCC_CR_PLLON; /* (7) */
RCC->CR &= ~RCC_CR_HSION; /* (8) */
FLASH->ACR &= ~FLASH_ACR_PRFTEN; /* (9) */
FLASH->ACR &= ~FLASH_ACR_LATENCY; /* (10) */
PWR->CR = (PWR->CR & ~(PWR_CR_VOS)); /* (11) */
}
