2020-01-17 10:05 AM
2020-01-17 10:45 AM
Pretty simple division occuring
Where
Period = P
Prescale = Q
UPDATE RATE = (TIMCLK / (Q + 1)) / (P + 1)
COUNT RATE = (TIMCLK / (Q + 1))
If TIMCLK == 24 MHz, and Q=0, P=0xFFFF
TIM->CNT would increment by 24 in 1 us, and 240 in 10 us
The Reference Manual should have a Clock Tree showing where the clocks are coming from and selected.
Product page and Reference Manual if you haven't already found them
https://www.st.com/en/microcontrollers-microprocessors/stm32l152re.html
https://www.st.com/resource/en/reference_manual/cd00240193.pdf
To validate, you could toggle a GPIO, or set the Period, and have the TIM toggle a pin, or use PWM mode
2020-01-17 08:57 PM
sir if i calculate update rate is somthing 366 hz and again if i calculate the frequency respecter 4 cycle that means one instruction excute 4 cylce (367/4) after that i got
i got 0.000567 etc then which bases you define this is the exact delay and counter incremented 24 in 1us sir explain me detail i
confused
2020-01-18 01:23 AM
follow below steps:
Enable clock in RCC Register(see refrence manual)
TIMx->PSC = 240 (in your case 24 MHZ clock)
TIMx-->EGR = TIM_EGR_UG; (update register)
TIMx->CR1 = TIM_CR1_CEN; // start timer
TIM->CNT : read counter value
you wiil get 10us delay
All the best
2020-01-23 02:25 AM
Have you done ?