How to use ETM on-chip

[Gpeti]

Hello,

I'm trying to record the execution trace of my firmware running on a STM32H753. For this I'm using the ETM functionality of Cortex M7. I don't want to use external tools but rather to use the ETF (Embedded Trace FIFO) that can be accessed directly from the processor.

I have been struggling to understand how the different debug components (ETM, ETF, DWT, etc...) are working together. i've read STM32H7 reference manual, ARM ETM technical ref manual and architecture spec but all these debug components are particularly confusing and unclear.

My understanding is that the DWT peripheral compares the execution address and triggers the ETM if it matches. Then the ETM feeds the ETF (?).

Here is the code:

// enable DWT in Debug Exception and Monitor Control Register
 
    *DEMCR |= 1  "the CMPMATCH[N] signals 
 
    // from the DWT unit are available as control inputs to the ETM unit"
 
    *DWT_COMP0 = 0x00000000; // adress comparator
 
    *DWT_MASK0 = 24;
 
    *DWT_FUNCT0 = 0x00000008; // generate CMPMATCH[0] event
 
 
 
    // setup ETM
 
    *ETM_LAR  = 0xC5ACCE55;   // unlock periph
 
    *ETM_CONFIG = (*ETM_CONFIG) | 0x00031F30; // enable all traces
 
    *ETM_PRGCTRL = 1; // enable ETM
 
 
    // setup ETF (by default in circular mode)
 
    *ETF_LAR  = 0xC5ACCE55; // unlock periph
 
    *ETF_FFCR = 0x00001123; // ARM recommends to set bits TRIGONTRIGIN FONTRIGEVT STOPONFL ENTI AND ENFT
 
    *ETF_TRG = 16; // number of 32 words to capture
 
    *ETF_CTL = 1; // enable trace
 
 
    // ******** processing just to fill the trace
 
    U4_INDEX = 1000;
 
    while(U4_INDEX--)
 
      __asm("nop"); 
 
 
    // wait for bit READY
 
    while ( ((*ETF_STS) & (1<<2)) == 0 );
 
        // read trace
        printf("*ETF_RRD=0x%x\r\n", *ETF_RRD);
        printf("*ETF_RRD=0x%x\r\n", *ETF_RRD);
        printf("*ETF_RRD=0x%x\r\n", *ETF_RRD);
        printf("*ETF_RRD=0x%x\r\n", *ETF_RRD);
 
        *ETF_CTL = 0; // disable trace

The READY bit of ETF_STS is never rising.

My question is: how to setup the different debug components to launch the trace execution (to record instructions) ?

My question is: how to setup the different debug components to launch the trace execution (to record instructions) ?

PS: sorry for the bad formatting, it's impossible to remove

[AMera.1]

Hi, is there any update on this topic?, I am willing to collaborate to solve this issue.

[lasta-dam]

I see that this is an old post, but since I think I have solved some of your issues I leave an answer for others to see.

I'm not so confident with how to exactly configure all the components, but I have gotten some trace output from the ETF at least.

There are some fundamental things you need to check with your configuration: 

1. Have you enabled CK_DBG_D1 that clocks the trace components? It clocks the ETF, Trace Funnel and CTI among others.  You enable the clock in the DGBMCU_CR register bit 21.
2. Take a look at this simplified block diagram of the trace components:  
    
   The trace from the ETM and ITM goes through the trace funnel before it arrives at the ETF. At reset both slave ports S0 and S1 are disabled, and thus no trace can flow to ETF. You need to enable the relevant slave port in the trace funnel.
3. From the ref manual about the ETF_TRG register:
   "In Circular buffer mode, specifies the number of 32-bit words to capture in the trace RAM following the detection of either a rising edge on the TRIGIN input or a trigger packet in the incoming trace stream, ATID =7'h7D. On capturing the specified number of data words, a trigger event occurs. The effect of a trigger event on the ETF behavior is controlled by the FFCR Register."
   It specifies the amount of words to capture after a trigger, have you something that triggers the ETF?

Kind regards

[Pavel A.]

Specially for evaluation of trace on STM32 MCUs, Segger has evaluation boards and software.

https://www.segger.com/products/debug-probes/j-trace/accessories/trace-reference-boards/overview/

[Tesla DeLorean]

PDQ Logic has an adapter for the NUCLEO-144 boards  https://www.pdqlogic.com/