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How to read and write form/to SDRAM MEMORY in STM32f429 controller

ashwinidigajerla
Associate II
Posted on April 25, 2014 at 08:27

stm32f429-DISCO board have 8MB of on chip SDRAM module.I want to interface SDRAM chip to microcontroller.I finished the initilization part.Now I wish to write and read data from it.

8MB SDRAM memory was organized as 4 internal banks 1MB each.How i write/read to total

 8MB with Single write/read command to SDRAM instead of individual internal bank Access.

Thank you

#whiskey-tango-foxtrot
25 REPLIES 25
ashwinidigajerla
Associate II
Posted on May 06, 2014 at 12:46

the pins are data pins to receive data ,address pins to send row,colum address  and cas,ras,clk,wp control pins.

I configured all the pins in alternate function mode.

you said that reading and writing using base address D0000000,then what is the use of data pins?

 

does sdram controller internally uses this address pins to generate address and data pins to place data on D0000000 address?please clarify me

thank you in advance

 

Posted on May 06, 2014 at 14:21

Look, the memory exists within the 4GB (32-bit) addressing space of the processor. The DATA pins allow the reading/writing of DATA across a 32-bit bus. They are bi-directional. The address and control pins are uni-directional and control where the SDRAM accesses it's internal memory structures.

If this is still alluding you then perhaps should pick up a text covering basic Computer System Architecture, and review it.
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ashwinidigajerla
Associate II
Posted on May 07, 2014 at 14:37

GOOD EVENING CLAVE

 

sdram_active_cmd()./*TO EACTIVATE A ROW IN THE MEMORY AS SDRAM IS                                                      ROW*COLUMN ORIENRED*/

{

chip enable=0;/* ALL ARE GPIO PINS*/

RAS=0;

CAS=1;

WP=1;

A0 TO A11=ROW ADDRESS ;

}

VOID READ_CMD() /*TO SELECT COLUMN IN ACTIVATED ROW AND TO READ DATA*/

{

chip enable=0;

RAS=1;

CAS=0;

WP=1;

AO-A11=COLUM ADDRESS;

}

VOID READ_CMD() /*TO SELECT COLUMN IN ACTIVATED ROW AND TO WRITE DATA*/

{

chip enable=0;

RAS=1;

CAS=0;

WE=0;

A0 TO A11 = COLUN ADDRESS;

}

1.will you tell me the data on RAS,CAS,WP,Ao to A12  should managed by  software or ,sdram controller will automatically change the pins level while read/write operations from Dooooooo.

2.my need is to write 0x5555 16 bit data to external sdram memory.

  *( (

Dooooooo)). = 

0x5555 ;is this correct? or

    data_pins = 

0x5555 ;

3.

Dooooooo is user address space or cntroller address space

    

ashwinidigajerla
Associate II
Posted on May 07, 2014 at 14:37

GOOD EVENING CLAVE

 

sdram_active_cmd()./*TO EACTIVATE A ROW IN THE MEMORY AS SDRAM IS                                                      ROW*COLUMN ORIENRED*/

{

chip enable=0;/* ALL ARE GPIO PINS*/

RAS=0;

CAS=1;

WP=1;

A0 TO A11=ROW ADDRESS ;

}

VOID READ_CMD() /*TO SELECT COLUMN IN ACTIVATED ROW AND TO READ DATA*/

{

chip enable=0;

RAS=1;

CAS=0;

WP=1;

AO-A11=COLUM ADDRESS;

}

VOID READ_CMD() /*TO SELECT COLUMN IN ACTIVATED ROW AND TO WRITE DATA*/

{

chip enable=0;

RAS=1;

CAS=0;

WE=0;

A0 TO A11 = COLUN ADDRESS;

}

1.will you tell me the data on RAS,CAS,WP,Ao to A12  should managed by  software or ,sdram controller will automatically change the pins level while read/write operations from Dooooooo.

2.my need is to write 0x5555 16 bit data to external sdram memory.

  *( (

Dooooooo)). = 

0x5555 ;is this correct? or

    data_pins = 

0x5555 ;

3.

Dooooooo is user address space or cntroller address space

    

Posted on May 07, 2014 at 16:20

FFS

1) It's handled by the SDRAM controller, programmed with the geometry of the part being addressed.

2)

unsigned short *sdram = (unsigned short *)0xD0000000;

sdram[0] = 0x5555; // 16-bit word @ 0xD0000000

sdram[1] = 0xAAAA; // 16-bit word @ 0xD0000002

3) It's within the 32-bit 4GB address range of the CPU, you have DIRECT access to it

A quick Google of ''How does SDRAM work'' yielded

http://www.es.ele.tue.nl/premadona/files/akesson01.pdf

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ashwinidigajerla
Associate II
Posted on May 09, 2014 at 11:58

good evening clave

1.I am getting Unexpected interput when writing to base address 0xd0000000,and my contro going to default hanglur function in start up code

 

2.I configured the GPIO pins in 1.alternate function mode in mode register

 

                                                      2.speed in spped regster

 

                                                      3.pushpull in out type register

 

                                                       4.nopullup_pulldown

 

                                                        5.alternate function value 0xc in alternate function                                                                register

 

 

         i didnot  set/reset any SDRAM_gpio pins.IS there any need ?

 

PLEASE CLARIFY ME

 

 

 

Posted on May 09, 2014 at 16:16

IT'S CLIVE

Why don't YOU look at some of the complete examples that I cited earlier for your board?

These initialize the pins, configure the SDRAM controller, and initialize the SDRAM part, and stop asking for clarifications, and inane questions that you could solve with a little research and by looking at the example code provided for the board.

STM32F429I-Discovery_FW_V1.0.1\Projects\Peripheral_Examples\FMC_SDRAM\readme.txt

 

 

STM32F429I-Discovery_FW_V1.0.1\Utilities\STM32F429I-Discovery\stm32f429i_discovery_sdram.c

 

 

STM32F4xx_DSP_StdPeriph_Lib_V1.3.0\Project\STM32F4xx_StdPeriph_Examples\FMC\FMC_SDRAM_xxxx

http://www.st.com/web/en/catalog/tools/PF259429

http://www.st.com/st-web-ui/static/active/en/st_prod_software_internet/resource/technical/software/firmware/stsw-stm32138.zip

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ashwinidigajerla
Associate II
Posted on May 15, 2014 at 14:55

Good evening 

I am working on STM32f29 Controller and I am using CooCox IDE tool and my board is STM32f429-DISCO board

It has the FMC(Flexible memory controller),with help of this FMC,we can interface SDRAM,NAND,NOR memories to the STM32f29. 

presently I am working on Interfacing SDRAM to STM32f29.

FMC control registers base address is 0xA0000000

contro registers used by SDRAM are starting from offset OX140

I am trying to access registers like this

#define FMC_SDRAM_BASE_ADDRESS   (0xA0000140)

SDRAM_reg_type *ST_pFMC_REGS_Ptr_t =  FMC_SDRAM_BASE_ADDRESS;

         var1= ST_pFMC_REGS_Ptr_t->FMC_SDCR1 ;

var2 = ST_pFMC_REGS_Ptr_t->FMC_SDCR2;

var3 = ST_pFMC_REGS_Ptr_t->FMC_SDTR1;

var4 = ST_pFMC_REGS_Ptr_t->FMC_SDTR2;

var5 = ST_pFMC_REGS_Ptr_t->FMC_SDCMR;

var6 = ST_pFMC_REGS_Ptr_t->FMC_SDRTR;

              

         I am geeting var1,var2,var3...var6 all are zero

ST_pFMC_REGS_Ptr_t->FMC_SDCR2 |= 0X00000005;

ST_pFMC_REGS_Ptr_t->FMC_SDTR1 |= 0X00000005;

ST_pFMC_REGS_Ptr_t->FMC_SDTR2 |= 0X00000005;

ST_pFMC_REGS_Ptr_t->FMC_SDCMR |= 0X00000005;

ST_pFMC_REGS_Ptr_t->FMC_SDRTR |= 0X00000005;

        

 

 var1=  ST_pFMC_REGS_Ptr_t->FMC_SDCR1;

 var2=  ST_pFMC_REGS_Ptr_t->FMC_SDCR2;

 var3 = ST_pFMC_REGS_Ptr_t->FMC_SDTR1;

 var4 =  ST_pFMC_REGS_Ptr_t->FMC_SDTR2;

 var5 = ST_pFMC_REGS_Ptr_t->FMC_SDCMR;

 var6 = ST_pFMC_REGS_Ptr_t->FMC_SDRTR;

 var1= ST_pFMC_REGS_Ptr_t->FMC_SDCR1 ;

        ofter writing data also I am geeting var1,var2,var3...var6 all are zero

as am fresher am unable find the reason for not writting to the REGISTER

will u please state any reasons,there this type of problems occurs

thanks

Posted on May 15, 2014 at 15:23

A failure to enable the appropriate clocks on a synchronous circuit.

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ashwinidigajerla
Associate II
Posted on May 19, 2014 at 15:13

good evening

 I have a basic doubt regarding SPI protocal

STM32f407 has 3 SPI's 

STM32f429 has 6 SPI's

I am unable to analize the how many slaves can be connected to controller in both of above cases.

Many of saying that using SPI we can connect any number of slaves.How it is possible?IF one SPI can interface any number of slaves then what is the need of providing 3SPI's or 6SPI's .

I am a fresher.first time working on this protocal

Can you provide any information regarding this?

Thanks