How to properly re-enable UART after an overrun failure?

[AIsma]

There is a scenario in my application where a UART FIFO overrun can occur. The application can handle dropped packets, so this is not a concern. The issue is that when an overrun occurs, the UART stops interrupting when new bytes fill the HW FIFO. I have looked at the reference manual and it seems that once the UART HAL IRQ handler clears the ORE flag, everything should be back to normal. What is required to bring the UART back to interrupting on received bytes?

I have tried the following:

1. Re-enable the UART
2. Re-enable the UART receive interrupts
3. Empty the FIFO when an overrun interrupt fires

I have seen other threads discuss this a little, but it is not clear what needs to happen to re-enable to UART to interrupt when a byte arrives or interrupt when the receive fifo threshold arrives, after an overrun interrupt failure.

[prain]

First you need to clear overrun flag. for STM32 L4 serie ORECF bit in usart ICR register must set. find equivalent register for your MCU.

[AIsma]

Hi prain,

Thanks for the reply. The HAL is already clearing that bit. I am thinking of maybe clearing the entire ICR register.

[prain]

some times ago, I encountered a similar problem with SPI fifo buffer in stm32f7 MCU. The only​ way I found to reset peripheral was disabling its clock in RCC and then reinitialize it. maybe it could be better that ST provide fifo flush command for serial peripherals.

[TDK]

Which chip? The answer will vary.

[AIsma]

I'm working with the STM32H743ZI