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Kris1
Kris1
Associate II
November 25, 2016
Question

how to make default high SPI MOSI signal of STM32F401

  • November 25, 2016
  • 5 replies
  • 4337 views
Posted on November 25, 2016 at 14:56

 Hi,

      We are using STM32F401 MCU, definition of SPI1 Initialisation function/api is  attached, we need to make MOSI signal to be high (default it should be high), if no communation between master and slave.

please suggest to how to make MOSI pin default high, if there is no communication between Master to slave.

please need help.

Thank you.

#spi #stm32f4
This topic has been closed for replies.

5 replies

waclawek.jan
waclawek.jan
Super User
November 25, 2016
Posted on November 25, 2016 at 15:19

MISO remains at the level of the last transmitted bit, and there's no option I know of which would change the SPI's behaviour in this.

Why do you need this?

JW

Kris1
Kris1Author
Associate II
November 26, 2016
Posted on November 26, 2016 at 08:30

hi jan,

    Thank you for quick reply.

    we have two setups: 

       1. working level setup (Atmel + VS1053b)  

       2. non working  setup (STM32F401 + VS1053b)

       we observed the waveforms both cases, only difference we observed is MOSI signal is high(in setup 1) and low (in setup 2), whenever  SPI  idle case.  

        so we assume there might be some issue with MOSI line,

        is there any issue with MOSI line low in setup 2?.  please suggest.

Thank you.     

waclawek.jan
waclawek.jan
Super User
November 27, 2016
Posted on November 27, 2016 at 13:11

I don't believe there is any SPI slave incarnation which would care about the idle level of input data line. Mind, SPI is just a minor evolution from a plain clock-edge-driven shift register.

I'd carefully check the captured waveforms against the VLSI chip's datasheet requirements as per data-to-clock-edge setup and hold times.

JW

Seb
Seb
ST Employee
December 10, 2016
Posted on December 10, 2016 at 19:10

What would happen with the following sequence:

- Enable SPI peripheral clock

- Write 0xFF in the DR

- Enable SPI register

Otherwise, you could also fake a transmit of a 0xFF data byte while the SPI MISO / MOSI pins are still Input with pull-ups and would get the job done with a little more effort.

Good luck!

martin2399
martin2399
Associate II
March 26, 2017
Posted on March 26, 2017 at 08:45

Hi,

I am having the same problem. I use SPI in half duplex mode, and to make sure MOSI is never left floating, I have a pull-up (4K7) on that pin. Further more I have a series resistor (1K) to the slave device.

After the communication has completed, it would be nice, if the pin would always be high - to avoid any current drain via the pull-up resistor.

Is it just bad practice with that pull-up resistor?

I will try the suggested ways - to force the MOSI in a high state...

BR Martin

S.Ma
S.Ma
Principal
March 26, 2017
Posted on March 26, 2017 at 11:45

If MOSI is push pull, the current leak should be fine regardless of the level.

If there are specific reasons to have MOSI high when not communicating, you could switch SCK as input then transmit 0xFF... Pull-ups are mostly useful for input pins. For output pins it will create sinking current when MOSI is low.

martin2399
martin2399
Associate II
March 26, 2017
Posted on March 26, 2017 at 12:09

Yes, it is possible to force the MOSI to high - if 0xFF is transmitted. It is not necessary to change SCK pin, because data can be transmitted without slave device is selected...

When using SPI in 3 wire mode (which is very typical when communicating with 3D sensors), the MOSI is automatically configured as inputs during communication, when slave transmits data. That is the reason, I have a pull-up on that pin.

BR Martin

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