How to increase the time between the SPI's last SCLK and CSN?

[bnguy.1]

I understand the MasterSSIdleness controls the time between the CSN and the first SCLK, and the MasterInterDataIdleness sets the number of cycles between data bytes...

But how can I extend the time after the last SCLK and before it raises CSN? At the moment, it's less than 4usec, which is violating the minimum timing of the slave device.

I can manually control the CSN by treating it as a GPIO, but would rather not, as I would have to poll to see that the data has been completely shifted out after calling HAL_SPI_TransmitReceive.. might as well bit-bang the SPI.

[waclawek.jan]

Which STM32?

If the hardware is not there to fulfill you expectations, you have to use software. I suggest having a look at timers after having read thoroughly the SPI chapter in RM.

JW

[TDK]

There is no hardware setting for that. You'll have to control CS as a GPIO if you have a requirement.