How to Dynamically Change Flash Base Address for OTA Updates Without Hardcoding in Bin File?

[satyam9896]

Hello ST Community,

I am working on an OTA (Over-The-Air) update implementation for an STM32L072 series microcontroller which has 192kb flash memory. In my setup, I have divided the flash memory into three regions: bootloader (starting at 0x08000000), App1 (0x08005000) which will initially running, and App2 (0x0801C000) where first firware binfile will be flash through OTA process. The bootloader handles jumping to the active application( suppose active app is 1 so it will set the msp and jump to that address for example in initial stage the msp is set at app1 address which is 0x08005000), and OTA updates allow switching between App1 and App2 slots( for example ones new fw will be flashed and CRC done the value for active app will be chnaged and will be store in flash and reset and again B.L will check and set msp and jump to that address).

Here is my challenge: When performing OTA updates, the bin file includes a hardcoded vector table offset and flash base address(VECT TABLE OFFSET 0x08005000 and same flash base address ). if a new firmware update is targeted at App2, the bin file assumes the flash base address is 0x0801C000. However, this creates an issue in scenarios where the firmware is deployed to devices that have skipped previous updates (e.g., suppose person A has done with very first update where B has skipped the update but ones second update will come in future the Person B's device, which is still running App1 will have problem bcz the second bin file have hard coded vect offset and flash base address value ). In this case, the new update intended for App2 cannot run because its vector table offset and flash base address conflict with the currently active App1 slot.

I want to avoid relying on hardcoded flash base addresses in the bin file. Instead, I aim to dynamically configure the flash base address and vector table offset at runtime based on the active slot values. This would allow skipped updates to function correctly without introducing mismatches.

Is there a recommended way to achieve this on STM32L0 series devices? Specifically:

1. Can the FLASH_BASE macro or the vector table offset be adjusted dynamically after firmware deployment?
2. What modifications are needed in the linker script or firmware to support this functionality?
3. How can I ensure compatibility with devices that skip one or more updates?

file name: system_stm32l0xxc.c

 #define USER_VECT_TAB_ADDRESS
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
     in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.
                                                     This value must be a multiple of 0x200. */

#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
                                                     This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
                                                     This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET       0x5000U   /*!< Vector Table base offset field.
                                                  //  This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */​

Any guidance or suggestions for this dynamic handling of the flash base address would be greatly appreciated!

Thank you!

[MM..1]

---

@satyam9896 wrote:

 code has offset table variable set as  0x00005000 and in keil configration setting the start address of IROM1 is : Start ->  0x0801C000 and size: 0xA000
why its so?

---

Have you basic knowledge about ASM and vector table in ARM ? Plus KEIL if i right rememmber have

default -fno-pic = code must be loaded on right place. But for your understanding offset in code 5000 and base 1C000 will never work.

void (*app_reset_handler)(void) = (void (*)(void))(*((volatile uint32_t*) (0x08005000+ 4U)));

when you load here code compiled for 1c000 , then here is 0x0801cxxx = code adrr for jump on reset, but you load it to 5000 then on addr is nothink loaded... 

When you build with -fpic and realy require place this code to any possition then in main start you require copy vector table to RAM (or in bootloader but here you require reserve RAM for this otherwise is erased in init app)

and after copy recalculate every vector address to actual load possition . Ofcourse then set VTOR to ram.

[satyam9896]

Understood, but can you give me any reference code where i can change this code like you have mentioned that 

When you build with -fpic and realy require place this code to any possition then in main start you require copy vector table to RAM (or in bootloader but here you require reserve RAM for this otherwise is erased in init app)

and after copy recalculate every vector address to actual load possition . Ofcourse then set VTOR to ram.

[MM..1]

#define APPLICATION_ADDRESS		(uint32_t)0x08004000
void Remap_Vector_Table(void) {
	uint32_t VectorIndex = 0;
	volatile uint32_t *VectorTable = (volatile uint32_t*) 0x20000000;

	for (VectorIndex = 0; VectorIndex < 48; VectorIndex++)
		VectorTable[VectorIndex] =
				*(__IO uint32_t*) ((uint32_t) APPLICATION_ADDRESS
						+ (VectorIndex << 2));

	__HAL_RCC_AHB_FORCE_RESET();
	__HAL_RCC_SYSCFG_CLK_ENABLE();
	__HAL_RCC_AHB_RELEASE_RESET();
	__HAL_SYSCFG_REMAPMEMORY_SRAM();
}

add recalc and change for your MCU and app. Plus RAM Origin require shift to end of this table.