Hello everyone,
After several hours of searching, I haven't found a working example of an electronic schematic for interfacing a USB OTG port with an STM32 F7.
Furthermore, the documentation provided "AN4869 Rev6" by ST is not clear enough to produce a schematic.
With the help of various links and documents I have tried to produce a schematic:
- https://community.st.com/t5/stm32-mcus-products/problem-with-usb-otg-in-host-mode-no-host-user-class-active/td-p/572407
- https://community.st.com/t5/stm32-mcus-products/problem-with-usb-otg-fs-device/td-p/622824
- NUCLEO-144pins_Altium_Schematics-Layout : MB1137.pdf : page 4
- https://controllerstech.com/usb-cdc-device-and-host-in-stm32/
- AN4869 Rev6
The basis comes from AN4869 page 16:
My schematic (2 PCBs linked by a small MOLEX type cable in blue):
In general I would like to know if this schematic is functional and correct.
More precisely:
- C24 = 4.7uF but it says "MAX". Is it more appropriate to use 1uF?
- Certain example adds a 1.5k ohms resistor on DP, is this necessary?
- Is R8 = 47k ohms useful, given that there's already "- VCC3->R5->D1 -"?
- For the "EN" input of the STMPS2151STR there's a pull-down R4 = 10k ohms but on some examples it's a pull-up, what's the right solution?
- Are the 2 resistors R1, R2 = 22 ohms essential for impedance matching?
- Is the FB1 ferrite really necessary, and won't it interfere with the VBUS?
- Apart from enabling USB OTG in STM32CubeIDE, is there any special configuration required for USB_OTG_VBUS?
Thank you in advance for your help.
best regards
1 ACCEPTED SOLUTION
Accepted Solutions
Hello @FBL
Thank you for your message and your help.
To avoid superfluous problems I will modify my Q1 transistor by using a bipolar NPN transistor and adding the 2 bridge resistors.
That said, I'm not convinced that 0 ohm resistors are useful. I did some quick research and it seems that they are only useful for PCB design. There are in fact two uses that I didn't know about:
1. Impedance matching and signal integrity
2. Fuse replacement and overcurrent protection
But I have the feeling that this has no impact in this particular case, as there is none on the D+ or D- signals.....
Perhaps someone more competent could provide a concrete answer.
Finally, in order to obtain the most accurate diagram possible, I found a solution.
I have a NUCLEO-F767ZI board with which I've set up a USB OTG connection that works. Since I have the physical board and the electronic schematics, I did a bit of retro engineering.
Schematic:
Circuit:
On the board you can see that some components are not mounted:
- R70
- R62
- R63
- SB186
- SB 184
And so I can deduce the final schematic:
I just need to find 4 special components:
- C54
- T2 9013
- D6 ESDA6V1BC6
- U12 STMPS2151STR
After some research I think that should do the trick:
- https://ch.farnell.com/fr-CH/vishay/tmcua1c475ktrf/condensateur-4-7-f-16v-10/dp/2491452
I'll make the modifications and give it a try.
Thanks for your help.
Hello @Boris19
I think you mean you already get started with Introduction to USB hardware and PCB guidelines using STM32 MCUs - Application note and Getting started with STM32F7 Series MCU hardware development
This schematic is a good starting point. It is recommended to route VBUS far from DP/DM and to power your target by an external power supply when using USB OTG or host function.
Hello @FBL
Thank you for your reply.
That's my problem, in my opinion the 2 documents you gave me are contradictory.
In "Application note" chapter 3.3 page 16 there is this concept diagram:
The VBUS line is directly linked to the MCU.
But in the "Harware development" document, chapter 1.1.2 page 7:
It is specified that the voltage must not exceed 3.6 V, which does not allow a direct link with the VBUS.
How can I do just that?
Thank you very much.
Best regards
Hello @FBL
Thank you for your reply.
To repeat your comments:
"VDDUSB is different from VBUS. VDDUSB=3.3V allows supplying USB transceiver: PHY FS in your case."
- Indeed
"When HNP or SRP is enabled the VBUS sensing pin should be connected to VBUS."
- Ok but that doesn't prove that it's electrically possible.
"Vbus is only present in between active sessions in SRP protocol. See here to learn how to manage it."
- Ok and according to your link it is explained that if Pin PA9 or PB13 are used as dedicated VBUS pin and the MCU is powered then they tolerate +5V.
- In my case, the MCU which is the peripheral is self-powered and therefore meets this condition.
- So I deduce that I can connect VBUS directly to PA9 even though I haven't found this anywhere in any official ST documentation...
"You need to share PCB full symbol Power schematic diagram."
- I don't understand what you're asking.
- My system is powered by 24 VDC and I use 2 converters 24V->5V and 24V->3.3V.
- Converter links:
https://www.digikey.ch/de/products/detail/dfrobot/DFR0571/9559261?s=N4IgTCBcDaICIDEBKAGArAdgIwgLoF8g
"I can see in your screenshot you are using STM32F722RET6 = STM32F722xx, this part number.........."
- Indeed I see that in document RM0431 chapter 32.3 page 1171 "OTG implementation".
- But I can use OTG_FS at 12Mbits which is fine for me.
Here is my updated schematic (with USB connector short-circuit corrected).
Could you tell me if this is correct and usable?
Thanks for your help.
Best regards
Hi again @Boris19
Please note that I cannot check your PCB. However, I can give you just recommendations and guidelines.
It seems the PCB is not yet correct. Here are some points to consider:
USB Disco pin cannot be connected to USB_DP signal.
Why do you use USB_VBUS_DET? You are missing 0 Ohm resistor on USB_PWRSW pin for the pull down.
Check Q1 transistor implementation on the reference board.
> In my case, the MCU which is the peripheral is self-powered and therefore meets this condition.
OTG dual role should allow to switch power delivery through the power switch.
Also Caution ESDA6V1BC6 (D5) is not entirely securing USB pins against ESD.
I hope this helps!
Hello again @FBL
Thank you for your reply.
I answer between the lines.
1. USB Disco pin cannot be connected to USB_DP signal.
However, this is what is described in your diagram with a 1.5kohm resistor.
Your example:
My idea:
2. Why do you use USB_VBUS_DET?
That's where it's not clear. The ST documentation doesn't mention VBUS_DETECTION, but there is a link between the VBUS and a GPIO input via a bridge divider. For me, this represents VBUS_DETECTION.
VBUS in green and VBUS_DETECTION in blue:
It's also present in your example diagram (in green):
3. You are missing 0 Ohm resistor on USB_PWRSW pin for the pull down
Sorry, what?
4. Check Q1 transistor implementation on the reference board.
Yes, I simply changed an NPN bipolar transistor T2 to use an N-channel MOSFT and avoid the divider bridge. But if you say it's going to disrupt operation, I'll make the change, but I'd like to know why.
5. OTG dual role should allow to switch power delivery through the power switch.
Yes, that's what the "STMP2151STR" is for, isn't it?
6. ESDA6V1BC6 (D5) is not entirely securing USB pins against ESD.
I think you're talking about D6 and for now it's ok I'll go with that.
What changes do you think need to be made to make this work?
Thanks a lot for your help.
Best regards
1- 3. USB_Disconnect is optional if it is not needed to control and check signal disconnection, you can discard it. See this example on eval board. Otherwise, if you would like to use it, you need to add a solder bridge or zero-ohm resistor also called jumper wires.
4. Honestly, I'm not sure if N-channel MOSFT replaces it without issues.
5-6. OK great
I hope this is helpful.
Hello @FBL
Thank you for your message and your help.
To avoid superfluous problems I will modify my Q1 transistor by using a bipolar NPN transistor and adding the 2 bridge resistors.
That said, I'm not convinced that 0 ohm resistors are useful. I did some quick research and it seems that they are only useful for PCB design. There are in fact two uses that I didn't know about:
1. Impedance matching and signal integrity
2. Fuse replacement and overcurrent protection
But I have the feeling that this has no impact in this particular case, as there is none on the D+ or D- signals.....
Perhaps someone more competent could provide a concrete answer.
Finally, in order to obtain the most accurate diagram possible, I found a solution.
I have a NUCLEO-F767ZI board with which I've set up a USB OTG connection that works. Since I have the physical board and the electronic schematics, I did a bit of retro engineering.
Schematic:
Circuit:
On the board you can see that some components are not mounted:
- R70
- R62
- R63
- SB186
- SB 184
And so I can deduce the final schematic:
I just need to find 4 special components:
- C54
- T2 9013
- D6 ESDA6V1BC6
- U12 STMPS2151STR
After some research I think that should do the trick:
- https://ch.farnell.com/fr-CH/vishay/tmcua1c475ktrf/condensateur-4-7-f-16v-10/dp/2491452
I'll make the modifications and give it a try.
Thanks for your help.
