How to configure ADC Dual mode to be as fast as possible

[matic]

Posted on August 11, 2015 at 20:21

Hi.

Currently, I have configured ADC regular simultaneous dual mode for 8 AD conversions. 4 of them on ADC1 (master) and other 4 on ADC2 (slave). I transfer results via DMA as 4 32-bits words into my destination array, which contains 4 32-bit elements. After that I separate them to 8 16-bit values using masks. I also have enabled SCAN mode (on both ADCs) for consecutive transfer.Now my question is, if there is possible to get already separated values in my destination array. That means, the destination array should be defined as 8 16-bit elements. If that is possible, I would save some time because there would be no need for masking.I am using STM32F103C8, if that is important.Thank you in advance #adc #dma #stm32f1

[Tesla DeLorean]

Posted on August 11, 2015 at 20:29

Why would you need to mask anything? Use casting, or just define the array as containing 16-bit values, the values don't have any weird bit alignment issues you have to separate out.

You need to look harder how memory is used, and how 8-bit, 16-bit and 32-bit values are stored into it.32-bits is just a dual cup-holder for two 16-bit beers.

[Tesla DeLorean]

Posted on August 11, 2015 at 20:37

The DMA controller is just interested in the address and step of a memory interaction, it's agnostic to how you've described that memory to the compiler.

uint16_t array[16]; // &array[0] is 0x20008000 for exampleThe DMA writes to 0x20008000, 0x20008004, 0x20008008, ... as you've given it the BASE address, and a 4 byte (32-bit) incrementarray[0] reads from 0x20008000 ADC1[0]array[1] reads from 0x20008002 ADC2[0]array[2] reads from 0x20008004 ADC1[1]array[3] reads from 0x20008006 ADC2[1]array[4] reads from 0x20008008 ADC1[2]array[5] reads from 0x2000800A ADC2[2]...You'd need to enable the ADC to SCAN otherwise it wouldn't index through the channels properly.

[matic]

Posted on August 11, 2015 at 21:16

Thank you for your quick response.

Ok, that was very helpful. Only one more thing.If I am correct, I have to assign both, the Peripheral and Memory size as a ''Word'' (32 bit) in DMA_CCR register? Thanks

[Tesla DeLorean]

Posted on August 11, 2015 at 22:00

Yes, the common data register is 32-bits wide, pulling two 16-bit samples at a single stroke, and then writing them to memory at the same width. Basically doubles the bandwidth, the SRAM is 32-bit wide.