How to: 32F4 Cortex-M4(F) Lazy Stacking and Context Switching

Robmar · ‎2022-12-22

There must be a function to save the FPU context of the 32F4 but after an hour searching all I see is 11 years of people asking for clarification on how to do this, and nice looking technical papers none of which list more than a couple of lines of ASM that are far from complete!

Is there a function in CMSIS or other library, of sample code that does this?

AScha.3 · ‎2022-12-22

processor executes the VSTM instruction (also known as the Floating-point Store Multiple)

from: an 298

https://developer.arm.com/documentation/dai0298/a

diy in asm:

https://stackoverflow.com/questions/38614776/cortex-m4f-lazy-fpu-stacking

If you feel a post has answered your question, please click "Accept as Solution".

gbm · ‎2022-12-23

Looking at FreeRTOS port.c module may also be useful.

My STM32 stuff on github - compact USB device stack and more: https://github.com/gbm-ii/gbmUSBdevice

Robmar · ‎2022-12-23

Saw that one, though helps, it requires investigation, testing, maybe some research.

So he runs the asm to read FPCAR and trigger a bus fault, guess he uses a flag so that his code in the bus fault handler knows to save the context, and hopefully voila!

That simple?

Robmar · ‎2022-12-23

Saw that one too, but thanks. It also needs a bit of research to know how to add that code, use it, test it, etc.,

This is such an important and necessary functions I am amazed that Arm, STM or CMSIS don't have a near function rolled out for users to just use.

AScha.3 · ‎2022-12-23

>This is such an important and necessary functions

shure, but most people do no more asm and write a task switcher in asm;

so in "C" (or c++ ) the compiler +optimizer should do the best code , without user inserting some asm instructions.

same when using rtos, task switching should work , even user knows nothing about VSTM . :)

If you feel a post has answered your question, please click "Accept as Solution".

Robmar · ‎2022-12-26

So no code snipped to save and restore the FPU state?

After a decade no one at STM thought to post this code?

I read that by reading from the FPU registers a bus fault is generated, so we have to the process the save/restore from the error handler. Its a bit messy really, and having to wade through RTOS code to extract their handler shouldn't be necessary if STM had their act together.

Hey, yes, its a criticism.