2013-08-31 12:45 PM
hello dear forum,
I am trying to setup window watchdog on F103 I want wwdg to be reset in a window of 8 - 12 milisecond I set wwdg prescaler to 2 so wwdg timer is counting every 0.227 microsecond the enable line sets the counter to 117 -> so117-63 = 25 milisecond max timeout value if I setWWDG_SetWindowValue(117);
the wwdg works fine however if I set a lover value for example 95 WWDG_SetWindowValue(95); so 117-95 = 22 * 0.227 = 5 ms minimum timeout valuethe processor never gets out of reset I tried with 78 --> 8.8 ms still resetting the uC what am I doing wrong ? why doesnot it work according to the manual ? thank youRCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE);
..................... TIM_Init() // timer sets to 10 ms period - its IRQ routine sets TIMERJOB variable WWDG_SetPrescaler(WWDG_Prescaler_2); WWDG_SetWindowValue(117); // <---- the problem here WWDG_Enable(117); while (1) { if (TIMERJOB) { TIMERJOB=0; WWDG_Enable(117); .................other jobs ; } #wwdg-f1032013-08-31 05:08 PM
I'd recommend you try two things.
1) Replace the WWDG kick in you main loop, and instead toggle a GPIO. Confirm on a scope that you don't ever exceed 12 ms, for whatever reason. ie stuck in an interrupt for too long. If you have a logic analyzer do this also when you have the WWDG running and capture the case when it resets. 2) Try an Enable value that is always lower than the window value, ie N-1, or 116 The 12 ms number looks good for a 36 MHz bus on APB12013-09-01 07:36 AM
hello thanks for the answer
I am sure the timer ticks at 10 ms interval - I checked it before with oscilosscopeTIM_TimeBaseStructure.TIM_Period = 7200;
TIM_TimeBaseStructure.TIM_Prescaler = 100;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM6, &TIM_TimeBaseStructure);
the only thing I suspect is that the timers first interrupt
comes right after I
volatile uint8_t TIMERJOB=0
............
TIMInit()
i.e it doesnot wait 10 ms for the first overflow of timer
is it posible ?
2013-09-01 07:59 AM
I'm sure the hardware TIM ticks correctly too, but that's not the point.
You're not kicking the WWDG in the TIM Update service routine.The interrupt service may be delayed or stalled. The foreground loop may not run in a timely fashion.I would start by looking at other aspects of your system before blaming the WWDG