HAL_QSPI_AutoPolling_* delay between command and response

[Bob Shankle]

Hi All,

I'm using a STM32H7 MCU with a ISSI IS25LP256D serial flash chip. (32MB.)

I wrote a driver using a simple microcontroller and was able to read the Status Register by adding a 8uSec pause after the 0x05 command and the clock pulses to get the response from the ISSI chip.

Now I'm trying to do the same thing on the STM32H7 chip. (It is failing to read the status register and times out on autopolling.) Here is some relevant code.

  QSPI_AutoPollingTypeDef sConfig;
 
  /* Configure automatic polling mode to wait for memory ready ------ */
  sCommand.InstructionMode   = QSPI_INSTRUCTION_1_LINE;
  sCommand.Instruction       = READ_STATUS_CMD;
  sCommand.AddressMode       = QSPI_ADDRESS_NONE;
  sCommand.AlternateByteMode = QSPI_ALTERNATE_BYTES_NONE;
  sCommand.DataMode          = QSPI_DATA_1_LINE;
  sCommand.DummyCycles       = 6;//DUMMY_CLOCK_CYCLES_READ;
  sCommand.DdrMode           = QSPI_DDR_MODE_DISABLE;
  sCommand.DdrHoldHalfCycle  = QSPI_DDR_HHC_ANALOG_DELAY;
  sCommand.SIOOMode          = QSPI_SIOO_INST_EVERY_CMD;
 
  sConfig.Match           = 0x00;
  sConfig.Mask            = 0x01;
  sConfig.MatchMode       = QSPI_MATCH_MODE_AND;
  sConfig.StatusBytesSize = 4; // 1
  sConfig.Interval        = 0x10;
  sConfig.AutomaticStop   = QSPI_AUTOMATIC_STOP_ENABLE;
 
  HAL_StatusTypeDef HAL_Status_Return_value =HAL_QSPI_AutoPolling_IT(&QSPIHandle, &sCommand, &sConfig);

Is there anyway to add the delay needed?

I'm using the chip in SPI mode and will eventually move on to QSPI mode.

thanks for any suggestions,

Bob

[Bob Shankle]

That is probably the part I'm missing. How do I add the space (time delay) between the 0x05 command and when clock pulses start to receive the data back from the ISSI chip.

[Tesla DeLorean]

Ok, so decompose this.

You're just trying to read the register, and check the reported state, so either make a command/receive combo with a delay, or make a HAL_QSPI_AutoPolling_IT_Ex() or HAL_QSPI_AutoPolling_Ex() variant that has some interstage delay.

[Bob Shankle]

exactly. thanks,

Bob

[Tesla DeLorean]

What's the actual errata on this device?

What does the logic analyzer output look like when you send the 0x05 command and then immediately read half a dozen bytes, after the WREN?

[Bob Shankle]

Hi Tesla,

The screenshot of the LAX was provided by the ISSI FAE, so I can't generate other shots. (The problem was sending WREN and the SR would return 0x04 instead of 0x02. The problem went away with the delay recommended.)

Is it possible to add the delay using the existing HAL library and I can run tests on my end?

Otherwise I'm going to look into writing code that does a simple bit-bang to get the SR to respond correctly.

thanks,

Bob