2007-10-05 02:25 AM
GNU compiler
2011-05-17 03:15 AM
Hi,
I would like to know if there is a GNU compiler for the STM32 cortexM3? thank in advance.2011-05-17 03:15 AM
Hi,
Be confident that all the ST ARM Core are supported by the GNU arm compiler even the STM32 (Cortex M3). In fact,a new RIDE7 (from Raisonance) and a new HITOP5.20 (from Hitex) debugger based on GNU arm compiler will be available SOON :-] ,to download on their web sites. Here are the links to the Raisonance and Hitex web pages: I hope this will be helpful. Best regards MBS2011-05-17 03:15 AM
gcc tools for the cortex are based on the codesourcery gcc branch.
Also consider Anglia IDEaliST, the cortex release is due in the next couple of weeks (beta testing now). http://www.anglia.com/columbus/index.asp Regards sjo2011-05-17 03:15 AM
thank you for your help.
We will see your link . glouglou44852011-05-17 03:15 AM
Hi,
The first version of the RAISONANCE IDE for STM32 is available there: http://www.stm32circle.com/resources/stm32primer.php#resources (click on ''CD-ROM image'') Best Regards, Vincent2011-05-17 03:15 AM
Quote:
On 02-08-2007 at 17:53, Anonymous wrote: Hi, The first version of the RAISONANCE IDE for STM32 is available there: http://www.stm32circle.com/resources/stm32primer.phpresources (click on ''CD-ROM image'') Best Regards, Vincent I tried that, but I got error message during installation on WinXP (see attachment). Any ideas what is wrong?2011-05-17 03:15 AM
Hi. The second try just now was successfull... probably some MS windows problem :)
2011-05-17 03:15 AM
Is the compiler aware of the new bit manipulation features of the Cortex core, or it this someting that I must take care of myself in my application?
2011-05-17 03:15 AM
If you mean bit banding then no compiler is aware as such, it is a feature of the cortex-m3 - the compiler will generate the instructions however.
It is normally implemented in macros, details can be found in the ref manual or have a look here: http://www.arm.com/support/faqdev/15921.html ST have provided inbuilt support for GPIO bit level access - by using the BSRR and BRR registers. I am guessing they have just aliased the GPIO bitband address. Cheers sjo