Frequency low by factor 9

[DetlefS]

Hi,

I used a Nucleo-F303RE board as template for my own hardware. Timers and clockfrequency are running fine on the NUCLEO but they are slow by factor 9 on my own hardware. USARTs are running on the exspected baudrate. Factor 9 gives a hint to the PLL block in clock generation. I recently learned that PLL is running on VDDA. I blocked VDDA from VDD with a bead. 

Is it the PLL?

Why does it not lock, where can I check?

Poor VDD? Poor blocking VDDA from VDD? 

Poor XTAL? Something totally different.

Why the correct baudrate?

THX for hints.

Cheers Detlef

[Tesla DeLorean]

The NUCLEO injects an 8 MHz clock source from the ST-LINK into the HSE_IN pin of the STM32F303

You will need to have a clock source or crystal to replace this on a stand-alone board, or change the code.

The MCU starts running of the internal HSI clock, and is later switched to a PLL and/or HSE based clocking source, at say 72 MHz vs 8 MHz

Check the Reference Manual, and the RCC registers to see what the options are.

Look at SystemClock_Config() code in the application.

[STOne-32]

Dear @DetlefS ,

8MHz * 9 = 72MHz which is the maximum CPU Frequency for this MCU . Most probably you are running either from internal RC - HSI Frequency and no PLL is activated . Or HSE with a crystal not operating correctly. If you can share schematics and Software code , then to debug your code and output the sysclk on MCO pin for monitoring.

hope it helps you 

STOne-32

[Tesla DeLorean]

>>Why the correct baudrate?

Because the code unpacks the RCC clock and PLL settings to determine the bus clocks and thus the basis against which the baud rate is derived.

printf("\n\nCore=%d, %d MHz\n", SystemCoreClock, SystemCoreClock / 1000000);
printf("HCLK=%9d\n", HAL_RCC_GetHCLKFreq());
printf("APB1=%9d\n", HAL_RCC_GetPCLK1Freq());
printf("APB2=%9d\n", HAL_RCC_GetPCLK2Freq());

[DetlefS]

Found that the xtal is not oscillating at all. It used to work on another board.

What does it need for oscillation?

THX Cheers Detlef

[Tesla DeLorean]

It needs the appropriate capacitive loading, and to be enabled.

See AN2867

https://www.st.com/resource/en/application_note/an2867-guidelines-for-oscillator-design-on-stm8afals-and-stm32-mcusmpus-stmicroelectronics.pdf

The PLL can be run off the HSI, you just have to use the right configuration

/**
  * @brief  System Clock Configuration
  *         The system Clock is configured as follow :
  *            System Clock source            = PLL (HSI)
  *            SYSCLK(Hz)                     = 64000000
  *            HCLK(Hz)                       = 64000000
  *            AHB Prescaler                  = 1
  *            APB1 Prescaler                 = 2
  *            APB2 Prescaler                 = 1
  *            PLLMUL                         = RCC_PLL_MUL16 (16)
  *            Flash Latency(WS)              = 2
  *   None
  * @retval None
  */
void SystemClock_Config(void)
{
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};

  /* HSI Oscillator already ON after system reset, activate PLL with HSI as source */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_NONE;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!= HAL_OK)
  {
    /* Initialization Error */
    while(1);
  }

  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
     clocks dividers */
  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2)!= HAL_OK)
  {
    /* Initialization Error */
    while(1);
  }
}

[DetlefS]

Hi all,

I am aware of the 8MHz injected clock from STLink to the target processor. I broke the NUCLEO board apart, I separated the  STLink part from the target processor part STM32F303. I rewired TCK/TMS/NRST/SWO/GND. I populated the xtal and the caps for STM32F303.

This works fine.

With the same software the xtal on my own board does not start oscillation. So it seems to be a hardware thing. Tomorrow I'll try to modify things according to AN2867, thx for the hint. I did not exspect it to be so sensitive, it is just 8MHz.

THX Cheers

Detlef

[SofLit]

Hello @DetlefS ,

Show your system clock configuration.

[DetlefS · Accepted solution]

Hi,

as I'm already mentioned is it the same clock configuration for the the NUCLEO and my own board.

The config is working on the NUCLEO but not on myown.

I was not aware of AN2867, I will stick to it for the next layout.

I'm very surprised that a mere 8MHz xtal is so sensitive to layout issues, it is not 3GHz though.

I tried to modify towards some of the AN2867 aspects  ( shorts wires, symmetry of Cs, stray capacitance) but could not get it running.

So I used an active quartz Oscillator. 

:( 

THX

Cheers