FMC word splitting for STM32H562ZI

[GCurz.1]

Hello everyone,

I have basic knowledge of embedded hardware and I am trying to expand the STM32H562ZI RAM through FMC. My configuration has a SDRAM at bank 1 with 8-bit data bus width (MT48LC64M8A2).

Indeed, I managed to make it work but only for single bytes, I would like to tell the compiler (or to whom it may concern) that when I write a word (32-bit) or half-word (16-bit) variable this is automatically converted in multiple transactions. At the moment, if I try for instance to write a "uint16_t" type I get an Hard Fault (e.g. use HAL_SDRAM_Write_16b() instead of HAL_SDRAM_Write_8b()).

Does FMC of STM32H562ZI support byte splitting? (I haven't noticed anything about that on the documentation or more probably I missed it)
Is there a way to make it work efficiently or writing byte arrays is effectively the only solution?

Thank you in advance for you help!

[KDJEM.1]

Hello @GCurz.1;

Is the Icache enabled?

If yes, please take a look at this FAQ: How to avoid a HardFault when ICACHE is enabled on the STM32H5 series.

Thank you. 

Kaouthar

[GCurz.1]

Thankyou for your answer @KDJEM.1

Neither the ICACHE nor DCACHE is enabled.

[KDJEM.1]

Hello @GCurz.1;

Thank you for updating post.

It is mentioned in RM0481 that AHB transactions are translated into the external device protocol. In particular, if the
selected external memory is 16- or 8-bit wide, 32-bit wide transactions on the AHB are split into consecutive 16- or 8-bit accesses. The FMC chip select (FMC_NEx) does not toggle between the consecutive accesses except in case of Access mode D when the Extended mode is enabled.

Could you please to Introduction to memory protection unit management on STM32 MCUs and check the MPU configuration.

It is recommended to configure the memory region linked to the SDRAM with the memory attribute "Device" or "Strongly-ordered" using the MPU (Memory Protection Unit). 

Thank you.

Kaouthar