FMC and 16/32b multiplexed mode

[dstindl9]

Posted on August 23, 2017 at 17:23

Hello,

I have some doubts with understanding and configuration of specific FMC modes. May I kindly ask you to check if my intentions are correct?

We have STM32F767 connected to our proprietary memory-mapped periphery (FPGA what can emulate anything) through FMC. We have connected full address bus and 16bit data bus and all possible control signals.

We would like to FMC behave like it has 32b for data access (from point of view of firmware).

It is possible with this hardware connection? I know there can be software workaround where you access 32b word with two 16b acces operations.

According to reference manual table 63 ('NOR Flash/PSRAM: example of supported memories and transactions') there are examples for 32b AHB data size. I couldn�t find any specific information about timing and waveforms so I think this operation is just internally (automatically) splitted into 2 FMC accesses - for example when I use 32bit pointer to virtual memory where FMC is mapped.

Thanks,

Dan

#fmc

[waclawek.jan · Accepted solution]

Posted on August 23, 2017 at 17:34

I think this operation is just internally (automatically) splitted into 2 FMC accesses

Yes.

13.3.1  Supported memories and transactions

[...]

AHB transaction size is greater than the memory size:

In this case, the FMC splits the AHB transaction into smaller consecutive memoryaccesses to meet the external data width.

JW

PS. It's not called *multiplexed* mode - mutilplexed refers to mode where addresses are time-multiplexed with data on the same bus.