FMAC writes YEMTPY and UNFLs bit incorrectly after pre-loading X1 coefficients with no reads or executes taking place. Why?

[KHarb.1]

I am using the FMAC for the first time and I am seeing strange behavior after preloading data to X1. I'm pushing 16 items to WDATA via a memory to memory DMA transfer. The buffer size is 16, so X1full should go high when it finishes. It doesn't. 

I placed a while delay after the X1 load command waiting for the X1full bit. When stalled on this line, I see the Yempty bit toggle on and off.  I also see the UNFL bit set in the SR register.

I'm not making any reads to RDATA, nor am I initiating any computations to write to Y yet, so none of this should be happening. This is the first code to run after HAL init functions, so nothing else should be active to interfere.

What could I be doing wrong?

//FMAC Config
FMAC->X1BUFCFG = 0x000010DF; //no threshold, 16 buffer length, 223 as base address.
FMAC->X2BUFCFG = 0x00001000; //no threshold, 16 buffer length, 0 as base address.
FMAC->YBUFCFG = 0x000001FF; //no threshold, 1 buffer length, 255 base address.
FMAC->CR|=0x00010000;//reset

FMAC->PARAM = 0x81000010; //FUNC=1, P=16 coeff, Q=dont care, R=don't care, Start =1
HAL_DMA_Start(&hdma_memtomem_dma1_channel5,(uint32_t)&CTST_IN[0],(uint32_t)&FMAC->WDATA,16);
while(FMAC->SR = !(FMAC->SR & 0x00000002)){};//second bit is X1full

[KHarb.1 · Accepted solution]

I guess these bits do not act as they do in the documentation until a calculation operation is started. Between the pre-load and the operation init, it appears undocumented behavior takes place.