FDCAN TX fails about half of the time (HAL)

[Krippkrupp]

Hello,

I've set up FDCAN on my STM32H753. I'm reading the transmissions using both an oscilloscope and an Analog Discovery 2.

I'm currently debuggning a loop which transmits the same message over and over again.

About half of the times I only get the SOF-bit and then nothing more, the other times I get the full correct message.

The second image, is the one with the correct result. I transmit the same message each time but still get different results.

When I get the wrong result when transmitting, HAL_FDCAN_EnableTxBufferRequest(&hfdcan1, FDCAN_TX_BUFFER0) still return HAL_OK

This is the way that I add the message to the buffer and how I transmit.

CAN_RESULT = HAL_FDCAN_AddMessageToTxBuffer(&hfdcan1, &TxHeader, TxMsg, FDCAN_TX_BUFFER0);
CAN_RESULT = HAL_FDCAN_EnableTxBufferRequest(&hfdcan1, FDCAN_TX_BUFFER0);

When looking at the SFR FDCAN1 I notice that..

FDCAN_TXBCF.CF= 0x01 - TX Buffer Cancellation Finished

FDCAN_TXBTO.TO = 0x00 - TX Buffer Transmission Occured

According to the datasheet this means "Arbitration loss of frame transmission disturbed"

Both registers are set to those values even on a successful transmission.

From the datasheet: The corresponding FDCAN_TXBCF bit is set for all unsuccessful transmissions.

I've also noticed that the FDCAN Error Counter register, FDCAN_ECR, changes on a successful transmission.

FDCAN_ECR.CEL=0x04 (was 0x03 prior to successful TX) - CAN Error Logging

FDCAN_ECR.TEC = 0x20 (was 0x18 prior to successful TX) - Transmit Error Counter

I can't find a pattern between when I get a successful transmit and when I only get a SOF-bit, it seems to be random.

(This was written 1 hour later than above)

Suddenly I can't get any correct transmissions any longer. I.e. I only get the SOF-bit. Nothing in the code has been changed, no settings has been changed either. Double and tripled checked the wires - all looks good.

I guess this could have something to do with it. However I can't really figure out what the issue is.

FDCAN_PSR.LEC = 0x05 - Protocol Status Register Last Error Code

From datasheet: LEC=0x05 Bit0Error: During the transmission of a message (or acknowledge bit, or active error flag, or overload flag), the device wanted to send a dominant level (data or identifier bit logical value 0), but the monitored bus value was recessive. During Bus_Off recovery this status is set each time a sequence of 11 recessive bits has been monitored. This enables the CPU to monitor the proceeding of the Bus_Off recovery

Below is my FDCAN settings

static void MX_FDCAN1_Init(void)
{
/* USER CODE END FDCAN1_Init 1 */
  hfdcan1.Instance = FDCAN1;
  hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC;
  hfdcan1.Init.Mode = FDCAN_MODE_NORMAL;
//  hfdcan1.Init.AutoRetransmission = ENABLE;
  hfdcan1.Init.AutoRetransmission = DISABLE;
  hfdcan1.Init.TransmitPause = DISABLE;
  hfdcan1.Init.ProtocolException = DISABLE;
  hfdcan1.Init.NominalPrescaler = 10;
  hfdcan1.Init.NominalSyncJumpWidth = 1;
  hfdcan1.Init.NominalTimeSeg1 = 7;
  hfdcan1.Init.NominalTimeSeg2 = 2;
  hfdcan1.Init.DataPrescaler = 10;
  hfdcan1.Init.DataSyncJumpWidth = 1;
  hfdcan1.Init.DataTimeSeg1 = 6;
  hfdcan1.Init.DataTimeSeg2 = 1;
  hfdcan1.Init.MessageRAMOffset = 0;
  hfdcan1.Init.StdFiltersNbr = 0;
  hfdcan1.Init.ExtFiltersNbr = 0;
  hfdcan1.Init.RxFifo0ElmtsNbr = 2;
  hfdcan1.Init.RxFifo0ElmtSize = FDCAN_DATA_BYTES_8;
  hfdcan1.Init.RxFifo1ElmtsNbr = 2;
  hfdcan1.Init.RxFifo1ElmtSize = FDCAN_DATA_BYTES_8;
  hfdcan1.Init.RxBuffersNbr = 2;
  hfdcan1.Init.RxBufferSize = FDCAN_DATA_BYTES_8;
  hfdcan1.Init.TxEventsNbr = 0;
  hfdcan1.Init.TxBuffersNbr = 2;
  hfdcan1.Init.TxFifoQueueElmtsNbr = 2;
  hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;
  hfdcan1.Init.TxElmtSize = FDCAN_DATA_BYTES_8;
  if (HAL_FDCAN_Init(&hfdcan1) != HAL_OK)
  {
    Error_Handler();
  }
}

Any ideas what the problem could be?

Thank you in advance!

[AScha.3]

looks like a hardware problem.

your transmission line ... how long? termination ? what is target/receiver ? speed (125kb) ?

[Krippkrupp]

Thank you for your reply.

I have CANTx & CANRx wired directly an Analog Discovery 2, which I use to read the protocol. I also look at the Tx-signal via an oscilloscope.

The target/receiver is an MCP2551 but I've removed the wires to the receiver, as there were numerous issues and I wanted to nail down origin of the issue.

The speed is 100 kHz. I've tried lowering it as well. It does annoy me quite a bit that I'm not able to get a single successful transmit anylonger. No idea why, I changed nothing in the software nor the hardware.

For the past 6 hours I think that I've gotten one successful Tx, the rest of them is just 1 SOF-bit and then nothing.

There's no notable noise on the lines either

[Ghofrane GSOURI]

Hi @Krippkrupp​ 

I can propose 2 points to check :

• try to add 2 *120ohm for the terminal CAN nodes on the bus =>this is used to reduce signal reflection on the CAN bus
• try also to add 2 * 01uF ceramic capacitor (non polarized capacitor)=> which is used for filtering any potential noise on the VDD signal to the ground

Please take a look to the file below it's a schematic that could helps you .

Also if it possible can you provide your file.ioc in order to reproduce the issue with your exact configuration

[Ghofrane GSOURI]

Hi @Krippkrupp​ 

Try to check your  FDCAN settings using a third party online tool like the Kvaser

this is the link please have a look :

Bit Timing Calculator for CAN FD (kvaser.com)

Kind regards

Ghofrane

[Krippkrupp]

Hello @Ghofrane GSOURI​, thank you for your reply.

Okay, so I've done two setups

• One setup just like your picture, but with two MCP2561 as trancievers
  • When looking at CANTx (from STM32), I only get the SOF-bit, like the pictures above
• In the other setup just wire CANTx from STM32 to an CANRx on Analog Discovery & an oscilloscope. CANRx from STM to CANTx on Analog Discovery. I.e. no tranciever is used. Wirelength ~5 cm
  • Same as above, only SOF-bit
  • I used to get ~50% successful transmits with this setup, but as of yesterday it suddenly stopped working. My code is automatically backed up so I double checked with older versions and it's the same project

I created a new clean project only containing FDCAN. This time I tried FDCAN2, just to make sure there's nothing wrong with FDCAN1 on the board that I'm using.

I also changed the settings to give 100 kbit/s.

I've tried both FIFO queue and Buffer, same problem with both. However in the .IOC file that I'm uploading, only Buffer is used.

[akuma.51]

Did you solve your problem???

[Karl Yamashita]

Are you using a NUCLEO-H753ZI by chance?