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facing system config crystal and RTC Crystal problem in STM32G0B1CET6

ashutamar
Associate II

Hi Team,
I am currently working with the STM32G0B1CET6 microcontroller and using two Abracon crystal parts, ABL-8.000MHZ-B2 and AB38T-32.768KHZ-B. However, I am encountering issues with the crystal when I use heavy ( like code more than 50% ram & flash of this STM-g0) percent of my code in STM. Attached is the schematic for your reference., 
 

ashutamar_0-1710242909253.png

Thank you,
Ashu Tamar

5 REPLIES 5
STOne-32
ST Employee

Dear @ashutamar ,

Can you please details what kind of issues , waveforms of signals. Try to output value of the LSE or HSE on MCO pin to understand the case . Also the PCB routing . I would recommend to try to isolate where these issues are coming ?

R10 is not necessarily and may create issues - it is not recommended . For LSE 32,768Khz to know the selected drive level with LSE - I see such crystal is 12,5pF CL and is not compatible with lower drives .

 

this is our reference App Note : https://www.st.com/resource/en/application_note/an2867-oscillator-design-guide-for-stm8afals-stm32-mcus-and-mpus-stmicroelectronics.pdf

hope it helps you .

STOne-32 

I'm hard pressed to draw a relationship between code size and crystal function.

Focus on other potential issues as more direct causes.

Make sure you actively clear auto/local variables.

Make sure you use appropriate flash wait states for speed and voltage considerations.

 

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>I'm hard pressed to draw a relationship between code size and crystal function.

:) :)

"crystal " has nothing to do with your  code size.

So you do something in your code, that is very wrong.

+

What are the "issues with the crystal  " ? which crystal (you show both) ?

How you know, its the crystal and not your code ??

If you feel a post has answered your question, please click "Accept as Solution".

 

Maybe consequence of this erratum?

What exactly are the symptoms?

JW

That sounds like linear code execution issue where the data feed to the prefetch wraps within the bank due to lack of broader context. ART related? Or Exception/IRQ has a start address close to the boundary

 

ie 0x08007FFE rolling into 0x08008000 if the banks were 32KB (adjust for architecture..), instead fetching 0x08000000

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Up vote any posts that you find helpful, it shows what's working..