2018-01-18 07:20 AM
In RM0390 rev.3, 27.5.3 Status register (SPDIFRX_SR), in description of SYNCD, SBD, OVR and PERR bits, clearing this bit is said to be performed by writing to respective bit in SPDIFRX_CLR_SR register.
There is no SPDIFRX_CLR_SR register; the correct name is SPDIFRX_IFCR.
JW
2018-05-31 02:58 AM
Hello,
The wrong register name
SPDIFRX_CLR_SR
is confirmed and should beSPDIFRX_IFCR.
This will be corrected in the coming reference manuals.
With Regards,
Imen