F4 Analog Watchdog run-time reconfiguration?

[parsec]

Posted on January 23, 2017 at 18:35

As the title says, can the analog watchdog high and low thresholds on F4xx be reconfigured while the ADC is running?

I vaguely recall reading somewhere that it could be changed dynamically at any time but can't for the life of me find this documentation now.

[Imen.D]

Posted on January 24, 2017 at 11:21

Hello

Vazic.Relko

,

You can refer to the 'Analog watchdog' paragraph in 'Analog-to-digital converter (ADC)' sectionwithin your reference manual for STM32F4.

As mentioned in the

http://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031pdf/files/DM00031pdf/jcr:content/translations/en.DM00031pdf

:

The analog watchdog feature allows the application to detect if the input voltage goes beyond the user-defined, higher or lower thresholds.

The AWD analog watchdog status bit is set if the analog voltage converted by the ADC is below a lower threshold or above a higher threshold. These thresholds are programmed in the 12 least significant bits of the ADC_HTR and ADC_LTR 16-bit registers. An interrupt can be enabled by using the AWDIE bit in the ADC_CR1 register.

Hope this helps you.

Regards

Imen

[parsec]

Posted on January 24, 2017 at 11:39

Hi

DAHMEN.IMEN

,

Thanks, yes I have read this section and I am aware of the basics of AWG. What I am not clear on, and what is not stated in the reference manual, is if ADC_HTR and ADC_LTR can be changed dynamically after the initial ADC+AWG configuration?

To provide an example; I am using ADC1 and sampling a signal with AWG set to trigger an interrupt if signal goes +/- 2 mV outside a reference voltage. In different environments the noise levels may be different, necessitating an adjustment of the AWG window to e.g. +/-4 mV.

In this scenario, what is the proper way to adjust HTR and LTR at run time, once the ADC is already configured and running? Do I have to re-init the ADC entirely or is it enough to call HAL_ADC_AnalogWDGConfig() with updated HTR/LTR numbers?

There is a __HAL_LOCK performed inside HAL_ADC_AnalogWDGConfig() and I am not sure how this will affect the ADC operation. Would changing the HTR/LTR registers directly be a bad idea?