2020-07-31 01:06 AM
Reading Embedded Flash memory chapter of RM0316 and can't grab how the write protection is supposed to work.
a) 4.3.2 Write protection says:
It is activated by configuring the WRP[1:0] option bytes
Each other instances where WRP is mentioned says i'ts either WRP[3:0} or, in FLASH_WRPR register description, it's 32 bits, so I guess [1:0] a typo.
b) Okay so we have 32 bits for write protection, and 4.3.2 Write protection says
The write protection is implemented with a granularity of 2 pages.
According to 4.2.1 Flash memory organization:
The memory organization is based on a main memory block containing 128 pages of
2 Kbytes in STM32F303xB/C and STM32F358xC devices, 256 pages of 2 Kbytes in the
STM32F303xD/E
How exactly do 32 bits describe protection of 128 pages (let alone 256 pages), 2 pages per bit?
Thanks,
JW
Solved! Go to Solution.
2020-07-31 05:45 AM
It's somewhat ... weird, I'd say. see table 14 in section in section 5 of the RM. WRP0 to WRP3 refers to the four bytes in FLASH_WRPR.
2020-07-31 05:45 AM
It's somewhat ... weird, I'd say. see table 14 in section in section 5 of the RM. WRP0 to WRP3 refers to the four bytes in FLASH_WRPR.
2020-07-31 06:11 AM
Thanks for the pointer, Andreas.
Well, OK, so bit 31 (or bit 7 of byte 3) does not cover 2 pages but 64+2 in 'B/C and 192+2 in 'D/E.
Why doesn't the chapter aptly named Write protection (4.3.2) say so?
JW
@Imen DAHMEN