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f103 LL spi DMA not interrupted

MacLaren
Associate III

‎2019-12-27 07:02 AM

hi

i use f103 to read ad7606 with spi

i see cube example for LL( hal spi has delay)

i want read two out of a2d so i config spi1 master receiver and spi2 slave receiver

clk of spi1 and spi2 and a2d connect together out A connect to spi 1 and out 2 connect to spi 2

i can see data in out A & B in scope but DMA interrupt not request 

/* Initialize all configured peripherals */
	MX_GPIO_Init();
	MX_SPI1_Init();
	MX_SPI2_Init();
	MX_DMA_Init();
	MX_TIM1_Init();
 
	__HAL_GPIO_EXTI_CLEAR_FLAG(GPIO_PIN_7);
	HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
 
	HAL_TIM_Base_Start_IT(&htim1);
	RESET_GPIO_Port->BSRR = RESET_Pin;
	RESET_GPIO_Port->BSRR = RESET_Pin;
	RESET_GPIO_Port->BSRR = (uint32_t)RESET_Pin << 16;
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
	if(GPIO_Pin==GPIO_PIN_7)
	{
		LL_SPI_Enable(SPI1);
		LL_SPI_Enable(SPI2);
		LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_2);
		LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4);
		__HAL_GPIO_EXTI_CLEAR_FLAG(GPIO_PIN_7);
		CS_GPIO_Port->BSRR = (uint32_t)CS_Pin << 16;
		CS_GPIO_Port->BSRR = (uint32_t)CS_Pin << 16;
 
		CS_GPIO_Port->BSRR = CS_Pin;
	}
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
 
 
	if(htim->Instance==TIM1)
	{
		CONV_GPIO_Port->BSRR = (uint32_t)CONV_Pin << 16;
		CONV_GPIO_Port->BSRR = (uint32_t)CONV_Pin << 16;
		CONV_GPIO_Port->BSRR = CONV_Pin;
	}
	/* USER CODE END 3 */
}
 
static void MX_SPI1_Init(void)
{
 
	/* USER CODE BEGIN SPI1_Init 0 */
 
	/* USER CODE END SPI1_Init 0 */
 
	LL_SPI_InitTypeDef SPI_InitStruct = {0};
 
	LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 
	/* Peripheral clock enable */
	LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
 
	LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
	/**SPI1 GPIO Configuration
  PA5   ------> SPI1_SCK
  PA6   ------> SPI1_MISO 
	 */
	GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
	GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
	GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
	GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
	LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
	GPIO_InitStruct.Pin = LL_GPIO_PIN_6;
	GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
	LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
	/* SPI1 DMA Init */
 
	/* SPI1_RX Init */
	LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_2, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
 
	LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PRIORITY_VERYHIGH);
 
	LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MODE_NORMAL);
 
	LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PERIPH_NOINCREMENT);
 
	LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MEMORY_INCREMENT);
 
	LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_2, LL_DMA_PDATAALIGN_BYTE);
 
	LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_2, LL_DMA_MDATAALIGN_BYTE);
 
	/* USER CODE BEGIN SPI1_Init 1 */
	LL_DMA_ConfigAddresses(DMA1,
			LL_DMA_CHANNEL_2,
			LL_SPI_DMA_GetRegAddr(SPI1), (uint32_t)rx2,
			LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_2));
	LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_2, 8);
	/* USER CODE END SPI1_Init 1 */
	/* SPI1 parameter configuration*/
	SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
	SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
	SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
	SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
	SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
	SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
	SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV4;
	SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
	SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
	SPI_InitStruct.CRCPoly = 10;
	LL_SPI_Init(SPI1, &SPI_InitStruct);
	/* USER CODE BEGIN SPI1_Init 2 */
	LL_SPI_EnableDMAReq_RX(SPI1);
	LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_2);
 
	/* USER CODE END SPI1_Init 2 */
 
}
static void MX_SPI2_Init(void)
{
 
	/* USER CODE BEGIN SPI2_Init 0 */
 
	/* USER CODE END SPI2_Init 0 */
 
	LL_SPI_InitTypeDef SPI_InitStruct = {0};
 
	LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
 
	/* Peripheral clock enable */
	LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
 
	LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
	/**SPI2 GPIO Configuration
  PB13   ------> SPI2_SCK
  PB15   ------> SPI2_MOSI 
	 */
	GPIO_InitStruct.Pin = LL_GPIO_PIN_13|LL_GPIO_PIN_15;
	GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
	LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
	/* SPI2 DMA Init */
 
	/* SPI2_RX Init */
	LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
 
	LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PRIORITY_VERYHIGH);
 
	LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MODE_NORMAL);
 
	LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PERIPH_NOINCREMENT);
 
	LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MEMORY_INCREMENT);
 
	LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_PDATAALIGN_BYTE);
 
	LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_4, LL_DMA_MDATAALIGN_BYTE);
 
	/* USER CODE BEGIN SPI2_Init 1 */
	LL_DMA_ConfigAddresses(DMA1,
			LL_DMA_CHANNEL_4,
			LL_SPI_DMA_GetRegAddr(SPI2), (uint32_t)rx2,
			LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4));
	LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, 8);
	/* USER CODE END SPI2_Init 1 */
	/* SPI2 parameter configuration*/
	SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
	SPI_InitStruct.Mode = LL_SPI_MODE_SLAVE;
	SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
	SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
	SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
	SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
	SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
	SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
	SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
	SPI_InitStruct.CRCPoly = 10;
	LL_SPI_Init(SPI2, &SPI_InitStruct);
	/* USER CODE BEGIN SPI2_Init 2 */
	LL_SPI_EnableDMAReq_RX(SPI2);
	LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_4);
	/* USER CODE END SPI2_Init 2 */
 
}
static void MX_TIM1_Init(void)
{
 
	/* USER CODE BEGIN TIM1_Init 0 */
 
	/* USER CODE END TIM1_Init 0 */
 
	TIM_ClockConfigTypeDef sClockSourceConfig = {0};
	TIM_MasterConfigTypeDef sMasterConfig = {0};
 
	/* USER CODE BEGIN TIM1_Init 1 */
 
	/* USER CODE END TIM1_Init 1 */
	htim1.Instance = TIM1;
	htim1.Init.Prescaler = 71;
	htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
	htim1.Init.Period = 49;
	htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
	htim1.Init.RepetitionCounter = 0;
	htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
	if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
	{
		Error_Handler();
	}
	sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
	if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
	{
		Error_Handler();
	}
	sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
	sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
	if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
	{
		Error_Handler();
	}
	/* USER CODE BEGIN TIM1_Init 2 */
 
	/* USER CODE END TIM1_Init 2 */
 
}
static void MX_DMA_Init(void) 
{
 
	/* Init with LL driver */
	/* DMA controller clock enable */
	LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
 
	/* DMA interrupt init */
	/* DMA1_Channel2_IRQn interrupt configuration */
	NVIC_SetPriority(DMA1_Channel2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
	NVIC_EnableIRQ(DMA1_Channel2_IRQn);
	/* DMA1_Channel4_IRQn interrupt configuration */
	NVIC_SetPriority(DMA1_Channel4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
	NVIC_EnableIRQ(DMA1_Channel4_IRQn);
 
}

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