2025-12-17 8:34 AM
Hello all,
I'm facing an issue with STM32 CubeMX / CubeIDE firmware using this display with X-CUBE-DISPLAY over FMC.
Each time I'm trying to initialize the LCD this function if((ILI9341_LCD_Driver.ReadID(LcdCompObj, &id) == ILI9341_OK) && (id == ILI9341_ID)) is always returns id = 0x0.
I've tried to play with timings, using formula from FMC/FSMC, but no luck.
This is my FMC initiliaztiation:
/* FMC initialization function */
static void MX_FMC_Init(void)
{
/* USER CODE BEGIN FMC_Init 0 */
/* USER CODE END FMC_Init 0 */
FMC_NORSRAM_TimingTypeDef Timing = {0};
/* USER CODE BEGIN FMC_Init 1 */
// hsram1.Instance = FMC_Bank1_1;
/* USER CODE END FMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence
*/
hsram1.Instance = FMC_NORSRAM_DEVICE;
hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_8;
hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
hsram1.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
/* Timing */
Timing.AddressSetupTime = 2;
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 16;
Timing.BusTurnAroundDuration = 2;
Timing.CLKDivision = 16;
Timing.DataLatency = 17;
Timing.AccessMode = FMC_ACCESS_MODE_A;
/* ExtTiming */
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
Error_Handler( );
}
/* USER CODE BEGIN FMC_Init 2 */
/* USER CODE END FMC_Init 2 */
}
My CPU is running at 216MHz and I've tried with these parameters:
| DATASET | 4 |
| ADDSET | 9 |
And nothing.
I've recheck the connections, I replaced the LCD with another one (both of them are working on F103 without FMC or on ATMEL).
Can somebody help me to fix this issue?
Thanks.
Solved! Go to Solution.
2025-12-18 3:01 AM - edited 2025-12-18 3:06 AM
Hello,
STM32F103 and STM32F7 are quite different in term of architecture.
For products with CM7 core (Ex: STM32F7) you need to take care about the cachability and the usage of the MPU.
You need to set the memory region for LCD as non cacheable: Strongly-ordered or Device.
AN4838 "Introduction to memory protection unit management on STM32 MCUs"
AN4839 "Level 1 cache on STM32F7 Series and STM32H7 Series"
I think that thread is the continuation of that one.
2025-12-18 3:01 AM - edited 2025-12-18 3:06 AM
Hello,
STM32F103 and STM32F7 are quite different in term of architecture.
For products with CM7 core (Ex: STM32F7) you need to take care about the cachability and the usage of the MPU.
You need to set the memory region for LCD as non cacheable: Strongly-ordered or Device.
AN4838 "Introduction to memory protection unit management on STM32 MCUs"
AN4839 "Level 1 cache on STM32F7 Series and STM32H7 Series"
I think that thread is the continuation of that one.
2025-12-18 4:13 PM - edited 2025-12-18 4:15 PM
Thanks @mƎALLEm pointing me to these documents!
It worked when I set to MPU region 0 with 256MB size and Device:
1. TEX level 0 (000), C(cachable) -> Disabled, B (Bufferable) -> Enable, NX (Instruction Access I beleive) -> Disabled, Shareable -> Enable
2. TEX level 2 (010), C(cachable) -> Disabled, B (Bufferable) -> Disabled, NX (Instruction Access I beleive) -> Disabled, Shareable -> Disabled
Indeed is a continuation of that thread.