Posted on November 24, 2015 at 06:11
Hello everyone.
I want to supply an external clock (which frequency is 24MHz) to a STM32L0 Discovery board.
I read the user manual (UM1775, ''OSC clock supply'', P22-23).
First, I made SB21 closed and SB20 open, and checked these conditions with a digital multimeter.
Next, I supplied the external clock to the board from the GPIO pin of PH0.
However, I don't know whether my work has gone well, and I have some questions.
1. I can still use an internal clock, is it OK?
After removing a connector between my clock source and PH0, the board still works.
I assumed that removing the connector meant my board had no clock supply and didn't work, but my idea was wrong?
I confirmed that the external clock was correctly supplied by checking a monitor line (pin) that I had added onto SB
2. How should I change a program?
I referred to official samples (stm32cubel0 and stm32snippetsl0), but there was no sample that used PH0 for an external clock supply.
I still use a clock configuration function from official samples (SystemClock_Config(), following function).
I know it should be modified, but I don't know how to change it.
Would you help me?
/**
* Brief This function configures the system clock @16MHz and voltage scale 1
* assuming the registers have their reset value before the call.
* POWER SCALE = RANGE 1
* SYSTEM CLOCK = PLL MUL8 DIV2
* PLL SOURCE = HSI/4
* FLASH LATENCY = 0
* Param None
* Retval None
*/
int SystemClock_Config(void)
{
uint32_t tickstart;
/* (1) Enable power interface clock */
/* (2) Select voltage scale 1 (1.65V - 1.95V)
i.e. (01) for VOS bits in PWR_CR */
/* (3) Enable HSI divided by 4 in RCC-> CR */
/* (4) Wait for HSI ready flag and HSIDIV flag */
/* (5) Set PLL on HSI, multiply by 8 and divided by 2 */
/* (6) Enable the PLL in RCC_CR register */
/* (7) Wait for PLL ready flag */
/* (8) Select PLL as system clock */
/* (9) Wait for clock switched on PLL */
RCC->APB1ENR |= (RCC_APB1ENR_PWREN); /* (1) */
PWR->CR = (PWR->CR & ~(PWR_CR_VOS)) | PWR_CR_VOS_0; /* (2) */
RCC->CR |= RCC_CR_HSION | RCC_CR_HSIDIVEN; /* (3) */
tickstart = Tick;
while ((RCC->CR & (RCC_CR_HSIRDY |RCC_CR_HSIDIVF)) != (RCC_CR_HSIRDY |RCC_CR_HSIDIVF)) /* (4) */
{
if ((Tick - tickstart ) > HSI_TIMEOUT_VALUE)
{
return(-1);
}
}
RCC->CFGR |= RCC_CFGR_PLLSRC_HSI | RCC_CFGR_PLLMUL8 | RCC_CFGR_PLLDIV2; /* (5) */
RCC->CR |= RCC_CR_PLLON; /* (6) */
tickstart = Tick;
while ((RCC->CR & RCC_CR_PLLRDY) == 0) /* (7) */
{
if ((Tick - tickstart ) > PLL_TIMEOUT_VALUE)
{
return(-1);
}
}
RCC->CFGR |= RCC_CFGR_SW_PLL; /* (8) */
tickstart = Tick;
while ((RCC->CFGR & RCC_CFGR_SWS_PLL) == 0) /* (9) */
{
if ((Tick - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
{
return(-1);
}
}
return(0); // Success
}
#stm32l053 #stm32l0-stm32l0-discovery
