Error in RM0430 (rev 7)

[Bob Anderson]

Posted on May 06, 2018 at 14:15

On page 177 the definition of bits 4:0 and 12:8 of RCC_DCKCFGR appear to be incorrect.

Should these be PLLI2SDIVQ and PLLSAIDIVQ respectively?

[Imen.D]

Posted on May 11, 2018 at 15:53

H

ello

Anderson.Robert.002

,

After check,there is a typo in the Bits 4:0PLLI2SDIVRDIVR

, it should be PLLI2SDIVR.

TheRCC_DCKCFGR register, bits 12:8 are used for the divider from PLL and should be called

P

LLDIVR.

Best Regards,

Imen