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Enabling UART transmit complete interrupt generates an unexpected interrupt

I'm using UART to send message. To prevent data race, I'd like to first disable then enable transmit complete interrupt when trying sending more data. But enabling transmit complete interrupt generates an unexpect interrupt.


static volatile bool g_sendDone;
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
	g_sendDone = true;
static void EnterCritical() {
static void ExitCritical() {
void TrySend() { // run periodically
	if (g_sendDone) {
		// meant to send more
		// doing nothing here also triggers HAL_UART_TxCpltCallback
	ExitCritical(); // calls HAL_UART_TxCpltCallback after this line, even if there is no transmission


Is there a good way to disable and enable transmit complete interrupt, and leave other interrupts enabled, such as transmit register empty interrupt?


Well there's only One interrupt handler and all the UARTs interrupts will go thru that.

You can enable bits in the ISR.

What's signaling in the unexpected case? Interrupts will continue to occur if the source is not correctly cleared and serviced.

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Thanks for the reply. I've done an experiment to read the USART's registers' values

  1. At the beginning of USART1_IRQHandler, SR is 0xc0 (TC, TXE=1, others 0), CR1 is 0x204c (RE, TE, TCIE, UE=1, others 0)
  2. At the beginning of HAL_UART_TxCpltCallback, SR remains 0xc0. CR1 becomes 0x200c (RE, TE, UE=1, others 0)
  3. At the begining of ExitCritical, the register has the same value as HAL_UART_TxCpltCallback
  4. The TC bit in SR register is set in initialization. The STM32CubeIDE generated function MX_USART1_UART_Init > HAL_UART_Init > HAL_UART_MspInit > __HAL_RCC_USART1_CLK_ENABLE set TC to 1 (why?). Clearing TC at the end of initialization prevents the transmit complete interrupt from happening unexpectedly.