Don't working USART in STM32F051K8U6

[s9]

Posted on May 30, 2016 at 21:58

Hello. I'm use MCU STM32F051K8U6 for simple devices.

I'm had a problem when using the UART.If i'm initialize USART thus (with SPL):It freezes the microcontroller, and the program is not executed.

void GPIO_Initialization (void)

{  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);  GPIO_InitTypeDef GPIO_InitStructure;  GPIO_StructInit(&GPIO_InitStructure);  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;  GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;  GPIO_InitStructure.GPIO_Pin = LCD44780_DATA | LCD44780_PIN_E | LCD44780_PIN_RS | GPIO_Pin_6 | GPIO_Pin_7;  GPIO_Init(GPIOB, &GPIO_InitStructure);  GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_1);  GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_1);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_1);  GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_1);  /** PA2, PA9 -> TX UART */  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_9;  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;  GPIO_Init(GPIOD, &GPIO_InitStructure);  /** PA3, PA10  -> RX UART. */  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_10;  GPIO_Init(GPIOD, &GPIO_InitStructure);}void USART_Initialization(void){  USART_InitTypeDef USART_InitStructure;  USART_ClockInitTypeDef USART_ClockInitStructure;  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);  RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);  USART_InitStructure.USART_BaudRate = 115200;  USART_InitStructure.USART_WordLength = USART_WordLength_8b;  USART_InitStructure.USART_StopBits = USART_StopBits_1;  USART_InitStructure.USART_Parity = USART_Parity_No;  USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;  USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;  USART_Init(USART1, &USART_InitStructure);  USART_Init(USART2, &USART_InitStructure);  USART_ClockInitStructure.USART_Clock = USART_Clock_Enable;  USART_ClockInitStructure.USART_CPHA = USART_CPHA_1Edge;  USART_ClockInitStructure.USART_CPOL = USART_CPOL_High;  USART_ClockInitStructure.USART_LastBit = USART_LastBit_Enable;  USART_ClockInit(USART1, &USART_ClockInitStructure);  USART_ClockInit(USART2, &USART_ClockInitStructure);  USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);  USART_ITConfig(USART1, USART_IT_TXE, ENABLE);  USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);  USART_Cmd(USART1, ENABLE);  USART_Cmd(USART2, ENABLE);}void NVIC_Initialization(void){  NVIC_InitTypeDef NVIC_InitStructure;  NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;  NVIC_InitStructure.NVIC_IRQChannelPriority = 4;  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;  NVIC_Init(&NVIC_InitStructure);  NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;  NVIC_InitStructure.NVIC_IRQChannelPriority = 4;  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;  NVIC_Init(&NVIC_InitStructure);}If initialize USART via direct written in the registers, the program works (at least do not crash).

void USART_Register_Initializiation(void)

{  RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);  USART1->BRR=0x1A0; //BaudRate 115200  USART1->CR1 |= USART_CR1_UE; //????????? ?????? USART1  USART1->CR1 |= USART_CR1_TE; //???????? ??????????  USART2->BRR=0x1A0; //BaudRate 115200  USART2->CR1 |= USART_CR1_UE; //????????? ?????? USART2  USART2->CR1 |= USART_CR1_TE; //???????? ??????????}This bug SPL, or am I doing something wrong?All source code this project (for Eclipse) is on GitHub.

https://github.com/kirra-cat/pwm_control/tree/master/firmware/control_driver/source

To one USART1 connected on One-Wire temperature sensor DS18B20, and to second USART2 connected USB-UART bridge on CP2102.P.S. ?n the STM32F030F4P6 also don't worked USART (same problem).

--

With best regards, Sergey S. Sklyarov.

Saratov, Russian Federation

#stm32f0 #!bug #stm32f051 #stm32f051 #usart #usart #usart #stm32

[Tesla DeLorean]

Posted on May 30, 2016 at 22:36

Probably going off to the IRQ Handler where you aren't servicing the TXE. Don't enable TXE interrupt unless you have data you are ready to supply, otherwise it will never leave the interrupt state.

Not much point in initializing the clocking parameters on an asynchronous USART

[s9]

Posted on June 02, 2016 at 10:24

Project

is building to

work

and

is

not used

division.

This is call stack.

Thread #1 (Suspended : Signal : SIGINT:Interrupt)

  WWDG_IRQHandler() at 0x80033bc   <signal handler called>() at 0xfffffff9   ____aeabi_uidiv_from_thumb() at 0x80033c4   RCC_GetClocksFreq() at stm32f0xx_rcc.c:1 083 0x8001cac   USART_Init() at stm32f0xx_usart.c:294 0x8002bca   USART_Initialization() at Initialization.c:160 0x80004d8   main() at main.c:33 0x8000fc0

Work stops at

RCC_GetClocksFreq(&RCC_ClocksStatus)

in

USART_Init()

function. The problem manifests itself in the calculation of the

pllclk = (HSE_VALUE / prediv1factor) * pllmull

; file stm32f0xx_rcc.c line 1083

What should be done to be able to use integer division?

--

With best regards, Sergey S. Sklyarov.

Saratov, Russian Federation

[Walid FTITI_O]

Posted on June 02, 2016 at 15:34

Hi sklyarov.sergey,

It seems like the HSE crystal does not starting. Check if HSERDY in RCC_CR goes high after the HSE is enabled, if it does not, then the crystal is not working. Review also the RCC registers to understand what clock is actually being used, and confirm the PLL settings. Then Check HSE_VALUE is it correct. Your PLL settings also need to match your design, see system_stm32f0xx.c The Oscillator Design Guide

http://www.st.com/content/ccc/resource/technical/document/application_note/c6/eb/5e/11/e3/69/43/eb/CD00221665.pdf/files/CD00221665.pdf/jcr:content/translations/en.CD00221665.pdf

helps you to ensure the right oscillator for your design -Hannibal-

[s9]

Posted on June 02, 2016 at 16:12

Hi Hannibal.

HSE is enabled, and if you remove USART initialization, everything else works correctly MCU runs on 48 MHz. But if i add the code, where the division is using for example, such

volatile uint32_t a = 1, b = 1, c = 1;

int main (void) {   RCC_Initialization(); ***   a = b/c + 1; ***

on the line

a = b / c + 1;

there is an error, an attempt to cause __udivsi3 ()

the call

 bl 0x80032a0 <__udivsi3>

when viewed from disassembler

In general, in my opinion, the error due to the fact that the Cortex-M0 has no hardware implementation division. And some GCC versions (do not know what it is) incorrect M0 generates a division code is error

____aeabi_uidiv_from_thumb

I'm updated compiler from GCC v4.9.3 to GCC v5.3.1, but it does not solve the problem:(

Already I tried to add when linking libgcc.a, and try different options for the building, but is it what some results to no avail:(

If someone uses GCC Compiler and STM32F051, which version you have a compiler, and what keys in building?

--

With best regards, Sergey S. Sklyarov.

Saratov, Russian Federation

[Tesla DeLorean]

Posted on June 02, 2016 at 17:35

I've been using 4.7 and 4.9 compilers, this for an L053, but have materially the same stuff working for all Cortex-M0 parts I've played with.

13 @ GNU C (GNU Tools for ARM Embedded Processors) version 4.9.3 20141119 (release) [ARM/embedded-4_9-
14 @ compiled by GNU C version 4.7.4, GMP version 4.3.2, MPFR version 2.4.2, MPC version 0.8.1
15 @ GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
16 @ options passed: -I . -I inc -imultilib armv6-m
17 @ -iprefix c:\tools\gcc49_2014q4\bin\../lib/gcc/arm-none-eabi/4.9.3/
18 @ -isysroot c:\tools\gcc49_2014q4\bin\../arm-none-eabi -MD out/main.d
19 @ -MF out/main.d -MP -MQ out/main.o -D__USES_INITFINI__ -D STM32L053xx
20 @ main.c -mcpu=cortex-m0 -mthumb -auxbase-strip out/main.o -g -ggdb3 -Os
21 @ -Wall -Wstrict-prototypes -Wextra -std=gnu90 -ffunction-sections
22 @ -fdata-sections -fverbose-asm
23 @ options enabled: -faggressive-loop-optimizations -fauto-inc-dec
24 @ -fbranch-count-reg -fcaller-saves -fcombine-stack-adjustments -fcommon
25 @ -fcompare-elim -fcprop-registers -fcrossjumping -fcse-follow-jumps
26 @ -fdata-sections -fdefer-pop -fdelete-null-pointer-checks -fdevirtualize
27 @ -fdevirtualize-speculatively -fdwarf2-cfi-asm -fearly-inlining
28 @ -feliminate-unused-debug-types -fexpensive-optimizations
29 @ -fforward-propagate -ffunction-cse -ffunction-sections -fgcse -fgcse-lm
30 @ -fgnu-runtime -fgnu-unique -fguess-branch-probability
31 @ -fhoist-adjacent-loads -fident -fif-conversion -fif-conversion2
32 @ -findirect-inlining -finline -finline-atomics -finline-functions
33 @ -finline-functions-called-once -finline-small-functions -fipa-cp
34 @ -fipa-profile -fipa-pure-const -fipa-reference -fipa-sra
35 @ -fira-hoist-pressure -fira-share-save-slots -fira-share-spill-slots
36 @ -fisolate-erroneous-paths-dereference -fivopts -fkeep-static-consts
37 @ -fleading-underscore -fmath-errno -fmerge-constants -fmerge-debug-strings
38 @ -fomit-frame-pointer -foptimize-sibling-calls -fpartial-inlining
39 @ -fpeephole -fpeephole2 -fprefetch-loop-arrays -freg-struct-return
40 @ -freorder-blocks -freorder-functions -frerun-cse-after-loop
41 @ -fsched-critical-path-heuristic -fsched-dep-count-heuristic
42 @ -fsched-group-heuristic -fsched-interblock -fsched-last-insn-heuristic
43 @ -fsched-pressure -fsched-rank-heuristic -fsched-spec
44 @ -fsched-spec-insn-heuristic -fsched-stalled-insns-dep -fschedule-insns2
45 @ -fsection-anchors -fshow-column -fshrink-wrap -fsigned-zeros
46 @ -fsplit-ivs-in-unroller -fsplit-wide-types -fstrict-aliasing
47 @ -fstrict-overflow -fstrict-volatile-bitfields -fsync-libcalls
48 @ -fthread-jumps -ftoplevel-reorder -ftrapping-math -ftree-bit-ccp
49 @ -ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-coalesce-vars
50 @ -ftree-copy-prop -ftree-copyrename -ftree-cselim -ftree-dce
51 @ -ftree-dominator-opts -ftree-dse -ftree-forwprop -ftree-fre
52 @ -ftree-loop-if-convert -ftree-loop-im -ftree-loop-ivcanon
53 @ -ftree-loop-optimize -ftree-parallelize-loops= -ftree-phiprop -ftree-pre
54 @ -ftree-pta -ftree-reassoc -ftree-scev-cprop -ftree-sink -ftree-slsr
55 @ -ftree-sra -ftree-switch-conversion -ftree-tail-merge -ftree-ter
56 @ -ftree-vrp -funit-at-a-time -fvar-tracking -fvar-tracking-assignments
57 @ -fverbose-asm -fzero-initialized-in-bss -mlittle-endian -mlra
58 @ -mpic-data-is-text-relative -msched-prolog -mthumb
59 @ -mvectorize-with-neon-quad