2013-01-23 09:22 AM
2014-11-21 10:06 PM
I hope you figured this out, but I believe this is normal behaviour.
From what I can gather from section ''10.3.15 Flow Controller'' of the reference manual, the DMA's NDTR register does not determine when the transfer is complete.Since the SDIO is the flow controller, the SDIO module signals to the DMA when the transfer is complete, so the NDTR doesn't really matter.