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D cache invalidation / enabling strange behaviour on STM32H723

Pyry
Associate II

Greetings! I'm experiencing strange behaviour when invalidating or enabling the DTCM-RAM on STM32H723 (using the Nucleo board for this). When debugging and using the step-over functionality, the invalidate and/or enabling process for the D cache seems very slow, taking at least over 30 seconds whereas if I just "run" the program in debugging mode and it runs normally. Is this something related to the stepping mode / ST-Link or is there something wrong with the MCU itself?

Pyry_0-1722244769707.png

This is what the variables inside the SCB_InvalidateDCache look like when stepping and I have confirmed that they look the same when running the code until some breakpoint.

1 REPLY 1
TDK
Guru

CubeIDE has pretty poor performance when stepping over code. If it's otherwise working fine, I don't think this is out of the ordindary.

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