Greetings! I'm experiencing strange behaviour when invalidating or enabling the DTCM-RAM on STM32H723 (using the Nucleo board for this). When debugging and using the step-over functionality, the invalidate and/or enabling process for the D cache seem...

Greetings!I generate periodically a 10MHz PWM signal of 8 pulses. The PWM signal has high polarity so the first edge is falling. I need to generate an interrupt/event on the rising edge that'll signal DMA to move data from a GPIO IDR to a data buffer...