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cubeIDE, stm32F407ZGT6 with HAL. Config. generated by IOC. SEGGER J-Link debugger. Most basic program w/ 1 GPIO pin driving a LED based on HAL_SysTicks. HSE 12 MHz.HCLK 168 MHz.(or any other freq. same behavior).

JIVAN.1
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Problem: During HALL_Init(), when executing macro __HAL_RCC_SYSCFG_CLK_ENABLE() the interrupt vector table is overwriten w/ garbage.

At first interrupt generated by TimeBase (SysTicks) debugger gets a SIGTRAP @ 0x1fff3744 outside of program code.

Interrupt vector table after __HAL_RCC_SYSCFG_CLK_ENABLE() looks like this:

0x00000000 20001D80 1FFF3DA1 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD

0x00000034 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD ­

0x00000068 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD 1FFF3DAD

What is it? I already lost 2 days trying to solve this. Any example i found in IDE works.

3 REPLIES 3

Is this some custom board?

Check what's going on with the BOOT0 pin, should be LOW

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JIVAN.1
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Indeed. Boot0 was 1. Test board is an OLIMEX STM32-E407.

Now it's working. Now I don't understand how examples from cubeIDE for this processor worked just fine...

Thank you very much ! Thread closed.

BOOT0 may assume exactly two logical states: logical 0 or logical 1.

If BOOT0 floats, its state is not defined and BOOT0 only acts as an antenna, i.e. captures noise and interference signals from the environment. It can therefore happen that a floating BOOT0 reads 0 several times and boots normally into the user area - but this is by no means reproducible.

It is therefore strongly advised to connect BOOT0 to GND. If you want to boot into the boot block later, it should be a pull-down of ~1...10kohms, so that you can apply a logical 1 via a switch, for example.

Regards

/Peter

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