CPAL I2C STM32F2

frederic239955_stm1_stmicro · ‎2012-10-12

Posted on October 12, 2012 at 15:51

Hello,

I'm using the CPAL library.

During the ''CPAL_I2C_Init ()'' when the I2C clock is set on, the BUSY bit in the status register SR2 is always set too. Why the BUSY bit is set ?

I'm using the I2C1 on a STM32F217VG. I2C pins are with 4K7 pull-up.

Best regards

Fred

#stm32-cpal-i2c

Tesla DeLorean · ‎2012-10-12

Posted on October 12, 2012 at 16:47

Because presumably one of the slaves is holding the SDA low, as many don't have effective reset circuits. You could clock them out via SCL.

Anyway I'd check the state of the SDA/SCL pins if the I2C comes up busy.

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frederic239955_stm1_stmicro · ‎2012-10-14

Posted on October 15, 2012 at 08:55

Yes, I've checked SCL & SDA lines with a scope, both are high during the initialization and after.

frederic239955_stm1_stmicro · ‎2012-10-15

Posted on October 15, 2012 at 10:32

I found the solution. I've forgotten to config cpal_i2c_hal_stm32f2xx.h file because this microntroller has several pins for the same I2C device. So the section 1 allows user to choose IO Pins for each device if possible (in accordance with used product: some products have only one possibility for the IO pins).