2021-07-21 08:29 AM
This is not a question, of course, just a rant.
and
JW
2021-07-22 07:45 AM
I'm not arguing that inconsistencies don't exist in the RM.
Should peripherals also be 0-based? ADC0/1/2 instead of ADC1/2/3? I much prefer the latter, but maybe I'm just used to it.
Just a thought exercise.
2021-07-24 02:52 PM
Maybe I am exceptionally stupid, but I simply cannot comprehend some things.
In the CMSIS mandated device headers, why is the RCC_APBxENR.RTCAPBEN bit in CubeF4 called RCC_APB1ENR_RTCAPBEN (as expected and consistently to the respective RM), while in CubeF7 the same thing is called - inconsistently to manual and everything - RCC_APB1ENR_RTCEN - with the added bonus of confusion with RTCEN bit in RCC_BDCR.
Would that be a question, I would end it with a question mark.
JW
2022-05-11 11:53 PM
More.
BKPSRAM (for Backup SRAM) in all STM32 except 'H7 where it is BKPRAM
JW