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Could we ask ST to be consistent?

This is not a question, of course, just a rant.

0693W00000D0FerQAF.pngand

0693W00000D0FpQQAV.png 

JW

12 REPLIES 12
TDK
Guru

I'm not arguing that inconsistencies don't exist in the RM.

Should peripherals also be 0-based? ADC0/1/2 instead of ADC1/2/3? I much prefer the latter, but maybe I'm just used to it.

Just a thought exercise.

If you feel a post has answered your question, please click "Accept as Solution".

Maybe I am exceptionally stupid, but I simply cannot comprehend some things.

In the CMSIS mandated device headers, why is the RCC_APBxENR.RTCAPBEN bit in CubeF4 called RCC_APB1ENR_RTCAPBEN (as expected and consistently to the respective RM), while in CubeF7 the same thing is called - inconsistently to manual and everything - RCC_APB1ENR_RTCEN - with the added bonus of confusion with RTCEN bit in RCC_BDCR.

Would that be a question, I would end it with a question mark.

JW

More.

BKPSRAM (for Backup SRAM) in all STM32 except 'H7 where it is BKPRAM

JW