confused about command declarations of QSPI flash memory for STM32F746 custom board with W25Q256FVEM QSPI flash memory chip

[MiladChalipa]

I am working on custom board STM32F7 MCU project with W25Q256FV quad SPI flash memory and according to the ST 5-Part quad SPI video tutorials, I copied all the necessary sections from public storage QSPI.c & QSPI.h files to my project, but based on my flash memory datasheet there is no Write volatile configuration register command and Read configuration register command in the manufacturer datasheet (Winbond) but all the other commands is same as my chip. If somebody could help me about running extended flash memory completely on my custom board, it will be appreciated.

//Command section in qspi.h file:

#define WRITE_ENABLE_CMD 0x06

#define READ_STATUS_REG_CMD 0x05

#define ENTER_4_BYTE_ADD_CMD 0xB7

#define WRITE_VOL_CFG_REG_CMD 0x81

#define SECTOR_ERASE_CMD 0xD8

#define CHIP_ERASE_CMD 0xC7

#define QUAD_IN_FAST_PROG_CMD 0x32

#define READ_CONFIGURATION_REG_CMD 0x85

#define QUAD_OUT_FAST_READ_CMD 0xEB

#define DUMMY_CLOCK_CYCLES_READ_QUAD 10

#define RESET_ENABLE_CMD 0x66

#define RESET_EXECUTE_CMD 0x99

[Andreas Bolsch]

Well, anything beyond the standard read/program and write enable/disable commands it totally vendor (and device!) specific. I'm afraid you have to check the datasheet carefully and see what kind of "non-standard" functionality you need and how it is activated in your device (if available at all!!!). E.g. this particular winbond chip has some extra configuration bits in "status register", "status register-2", "status register-3" (e.g. the QE bit) and special commands to write and read these registers.

So, in particular, there is no "write volatile conf. register" command, as this register simply doesn't exist in your flash chip. Yes, that's a real mess, but that's the way it is.

A very limited set of extra functionality can be queried via SFDP, but older chip families either do not supply this data at all or only an almost useless subset ...

[MiladChalipa]

Andreas, If I understand it correctly, I have to write some extra functions for Read/Write the status registers (1/2/3) right? So messy chip :tired_face:

[Andreas Bolsch]

Oh, no, there's nothing wrong with the winbond chips. As there is neither an official nor any de facto standard for the extra functionality, every vendor has(!) to define it on its own.

"Write some extra functions for ..." sounds a bit too complicated. In fact you've only to modify the already present functions in minor way: Different command (one byte) and different register data (one byte). The time consuming task is to skim through the datasheets and collect the required settings.

However, watch out for write enable requirement. Some register write commands do require the write enable bit to be set in advance, others don't.

[MiladChalipa]

Andreas, I will do some changes and add some, thanks a lot

[Tesla DeLorean]

All this stuff is messy, all very similar yet different in subtle ways, so it is hard to code a universal driver without it becoming rather large and unwieldy, or breaking with the next chip that comes along.

Placeholder so I can find these later,

https://community.st.com/s/question/0D53W00000OTxNcSAL/compatible-quad-spi-memories-micron-is-not-making-the-n25q128a-quad-spi-flash-memory-my-question-is-are-the-instruction-sets-the-same-on-other-manufacturers-quad-spi-flash-memory-chips