CM4 core executes slower on Flash Bank 1 than Flash Bank 2 in STM32H757

[JTari.1]

I am using STM32H757 dual core chip and default configuration of cubeMX generates the projects in such a way that CM7 core executes from Flash Bank1 and CM4 core executes from Flash Bank2.

I modified this behavior (to have Bootloader, config data etc) such that CM4 executes from Flash Bank1 and CM7 executes from Flash Bank2 But the result is unexpected. The execution time of one my most time critical function (that executes in an ISR context) changed from 140us to 375us.

Can some one comment on this that what would be the reason. If i look at the Memory organization, i can see that both Flash Banks (1 and 2) are in D1 domain. and CM4 core is in D2 domain. Any help would be appreciated.

[SofLit · Accepted solution]

Hello,

It seems like you left ART enabled for Flash Bank 2 range.

So, go to stm32h7xx_hal.c file and replace:

  __HAL_ART_CONFIG_BASE_ADDRESS(0x08100000UL); /* Configure the Cortex-M4 ART Base address to the Flash Bank 2 : */

by

__HAL_ART_CONFIG_BASE_ADDRESS(0x08000000UL);  /* Configure the Cortex-M4 ART Base address to the Flash Bank 1 : */

[JTari.1]

Thankyou. It worked

[SofLit]

Thank you for the feedback.

Could you please mark my answer that resolved your issue by selecting "Select as best". This will help other users find that answer faster.

Thank you.